Jul 14, 2007 #1 V vjfaisal Full Member level 4 Joined Sep 24, 2006 Messages 205 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,296 Location pakistan Activity points 2,701 hi if we have asked to design a sytem with more than 64k i/o ports, so what i have to do for the following specificatin. best regards
hi if we have asked to design a sytem with more than 64k i/o ports, so what i have to do for the following specificatin. best regards
Jul 14, 2007 #2 I ieropsaltic Full Member level 4 Joined Sep 25, 2006 Messages 199 Helped 64 Reputation 128 Reaction score 18 Trophy points 1,298 Activity points 2,595 I'd multiplex the inputs. Use latches to keep the input then divide this input and feed your processor's input by a different part each cycle. The input variation however should be slower than the processor's bus clock.
I'd multiplex the inputs. Use latches to keep the input then divide this input and feed your processor's input by a different part each cycle. The input variation however should be slower than the processor's bus clock.
Jul 15, 2007 #3 V vjfaisal Full Member level 4 Joined Sep 24, 2006 Messages 205 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,296 Location pakistan Activity points 2,701 i donot understand what u tell, please clear me what you wan to say.....
Jul 15, 2007 #4 S sohiltri Member level 5 Joined Dec 16, 2006 Messages 80 Helped 6 Reputation 12 Reaction score 1 Trophy points 1,288 Activity points 1,750 U can easily design it using memory mapped I/O ... It can have a max of 64K ports in 8086....because single bank can have max of 64k....
U can easily design it using memory mapped I/O ... It can have a max of 64K ports in 8086....because single bank can have max of 64k....