Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

question on the power network in floorplan

Status
Not open for further replies.

jackson_peng

Full Member level 2
Joined
Apr 11, 2005
Messages
139
Helped
24
Reputation
48
Reaction score
9
Trophy points
1,298
Location
Shanghai, China
Activity points
2,380
when draw the power supply network in floorplan,
why should we use the top two metal?
can anyone give the reason.
 

jackson_peng said:
when draw the power supply network in floorplan,
why should we use the top two metal?
can anyone give the reason.

Less resistance? In cmos process, top metal layers have less sheet resistance. Correct me if I am wrong.
 

there should not be any volage swing for the cells/macros, if so they may go to metastable state or transistion delay problems etc.

so power network should have very less resistance. so we prefer the top 2 metals for power routing.
 

jackson_peng said:
when draw the power supply network in floorplan,
why should we use the top two metal?
can anyone give the reason.
really??? In our lab the top metal is used to route gobal and critical net and only the second and third level from top is used to power. any comments???
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top