question on sigma-delta modulator

[abcyin]

Hi, all,

I am a very beginner on this topic (sigma-delta modulator), so could you anyone tell me that, in the following figure, how to choose the values for VREF+ and VREF-, and why?

Thanks very much in advance!

 

[YooCanFly]

i dont think there is a hard rule on vref+ and vref-
it would also depend on what order your ADC is. For a simple 1 bit ADC,
general rule of thumb is about 70% and 30% of your supply voltage.
(assuming 0-supply voltage is your input range)

I dont know if this is a good explanation, but let me give it a try.

you want to integrate the difference between input and vref, so you want (input - vref) to be as big as it can be to help the integrator reach 0.

For that, its better to choose vref+ to be between 50% to 100% of your supply
and vref- to be between 0 to 50%.

well, i would think the best results are achieved at 75% and 25%, but during my simulation long ago, i found best results at 70% and 30%.

I hope this helps.

 

[mikersia]

In this SDM configuration (VREF+ - VREF-) will define maximum voltage swing both at the x input and integrator's output. VREF- could be zero.

 

[nelson_analog]

For this circuit, the Vref+ and Vref- must be one is positive and one is negative since the reference of comparator is 0. You can check book for how to decide the reference.

 

[spree2007]

Vref+ and Vref- set the feedback factor

in your case, I think connect them to vdd and gnd is ok and convenient