question on sampling and hold circuit

[abcyin]

Hi, all

When I was trying to design a Sampling and hold circuit as shown in the following figure, I met a problem about the opamp in the circuit. The question is that, is that ok if there is no input DC voltage bias for the opamp in the hold period? When I was simulating the circuit, the output is ok as expected, but is the simulation really correct? or is there any potential danger for using this circuit?

Thanks in advance!

 

[keith1200rs]

Hi, all

When I was trying to design a Sampling and hold circuit as shown in the following figure, I met a problem about the opamp in the circuit. The question is that, is that ok if there is no input DC voltage bias for the opamp in the hold period? When I was simulating the circuit, the output is ok as expected, but is the simulation really correct? or is there any potential danger for using this circuit?

Thanks in advance!

That's correct. During the "sample" period some capacitance is charged based on the input voltage. During the "hold" period the opamp buffers the capacitance voltage and the capacitor is disconnected from the signal source. With CMOS it can hold for quite a while, even with a small capacitor.

Keith.

 

[abcyin]

Thanks for your reply,

but do you mean the input capacitance of the opamp will be charged during the sample period by VB, and when the hold period comes, the voltage could be maintained for some while?

if not, could you explain how would the input bias be settled ?

Best regards

 

[keith1200rs]

In your circuit, initially all switches except S4 are on. This will charge the top CS to (Vin+ less VB). Ditto with Vin-. So it is the two CS capacitors that are effectively your sampling capacitors. When the switches all change (S4 on), you are left with the voltage of the two CS capacitors in series which is then on the input of the opamp.

Keith.

 

[abcyin]

Thanks very much, I think I've got what you mean.

 

[keith1200rs]

I think the circuit you have is not the easiest to understand. It is a switching circuit, auto zeroing and fully differential. Also, shorting the two outputs of the opamp together could only be done with an opamp designed to do that. Start off with a simple one and work your way up to fully differential, autozeroing ones.

https://en.wikipedia.org/wiki/Sample_and_hold

Keith.