Question on power supply ramp up..

[suria3]

Hi Guys,

I have designed a LVDS driver with a 3.3V power supply. I have used the 1.8V transistors in the driver design to help in the voltage headroom limitation and its work
fine. Now, i have issue with my design when I ramp up the power supply from 0V to 3.3V with the rise time of 10ns. From the transient simulation I noticed that I'm getting the voltage breakdown issue from some of the transistors which exceed 1.98V. My question here is, do I need to worry on this transistor breakdown issue due to ramp up, or is it normal to have this break down while ramping up power supply voltage. Please explain.

Thanks,
suria.

 

[DenisMark]

10 ns is too fast. Check with no less than 1us ramp.
E.g. off-chip supply capacitance 10uF, rise time 1us to 3V, so requered current I=C(dU/dt)=30A too much. Really ramp more slow than 1us.

 

[suria3]

10 ns is too fast. Check with no less than 1us ramp.
E.g. off-chip supply capacitance 10uF, rise time 1us to 3V, so requered current I=C(dU/dt)=30A too much. Really ramp more slow than 1us.

Denis,

Since 10ns is very fast, i did run for 10us and still got the breakdown issue. Then I run it at 100us ramp up and the breakdown is no more. So, i would like to know, is 100us is too slow of ramping up, we know that the external power supply filter will have caps of 10uf and plus which will slow down the power supply initialization.

Thanks,
Suria