Question on FSK modulator

[abcyin]

Hi, all

I am designing a FSK modulator, using the scheme that changing the VCO output frequency to represent the baseband data. In theory, the VCO in the PLL loop will be locked at first, and then when the baseband starts transmit data, the PLL will operate in open loop mode, and the VCO output frequency will be modulated, to fc+delta(f) or fc-delta(f), but there is a problem, how can I realize the fc+delta(f) and fc-delta(f) in the same circuit?

thanks in advance!

 

[rfsystem]

Typically that is done by analog frequency modulation where you have either an additional varactor element where you switch the control voltage between two settings starting from a neutral control voltage. A further sheme is to have an analog adder which control the varactor. The third sheme is that there is one varactor and a standard charge-pump which direct drive the loop filter cap. Open loop modulation is done by setting the varactor voltage to two voltages depending on the bit with the help of voltage-output DAC. The DAC-values are determinated before by setting the synthesizer to the wanted modulation frequencies and then using the DAC to convert the closed loop voltage at this modulation points. That overcome temp, drift, spread and nonlinearity.

 

[abcyin]

Typically that is done by analog frequency modulation where you have either an additional varactor element where you switch the control voltage between two settings starting from a neutral control voltage. A further sheme is to have an analog adder which control the varactor. The third sheme is that there is one varactor and a standard charge-pump which direct drive the loop filter cap. Open loop modulation is done by setting the varactor voltage to two voltages depending on the bit with the help of voltage-output DAC. The DAC-values are determinated before by setting the synthesizer to the wanted modulation frequencies and then using the DAC to convert the closed loop voltage at this modulation points. That overcome temp, drift, spread and nonlinearity.

Thanks very much for you kind reply.
But I am still not so clear about the third scheme, so could you please say something more about it, or maybe a sketch view could be more helpful and appreciated.
And could you please give me any documents about the GFSK modulation?
Thanks a million and best wishes.

 

[rfsystem]

The third concept requires that the synthesizer could generate the three frequencies

f0-fsk
f0
f0+fsk

The frequency modulation, 2*fsk ,should be within the varactor control range. The frequency synthesizer is then at system or IC startup w/o activating the output buffer or PA driver switching to the 3 different frequencies. The analog control voltage for the varactor is for the three frequencies sampled with an ADC.

If the FSK modulation is active the synthesizer operate in openloop mode. So the charge-ump action is disabled by deactivating the chargepump. Instead the previous stored modulation control voltages from the ADC are set by a DAC. In this way you can complete avoid any process/temp/drift issues. Clearly after end of the modulation phase the synthesizer should be switched over to closedloop mode or another calibration cycle should start.

 

[abcyin]

Thanks very much for your reply, I think I have got what you mean.

however, another question arises, it's about the modulation index for bluetooth GFSK modulation. it is always defined that the modulation index for bluetooth is 0.32, so the question is, what's the reason for this value to be defined, but not 0.1, 0.5, or any other value?
Another question is whether this value (0.32) should be mandatory, if this value drifts to 0.33 or 0.31, what will happen, is that still OK for demodulation?

thanks in advance!