question on class AB common source output stage fundamental

[ntang]

Hi folks,
I am designing a rail-to-rail opamp, and I have a hard time understanding common source class AB output stage. I have read many papers on this topic, but I have not been able to understand some of the fundamentals, e.g. operation region of the output transistors, translinear loop, current control. Some papers somewhat explain some of these, but I feel like the explanation is not deep and clear enough for a novice in this topic.
In my previous attempt to design the output stage, I tried to bias both output PMOS and NMOS in saturation, and I got about 80dB DC gain. However, in post layout sim, the NMOS fell into triode region, and I obtained only 60dB gain. Apparently, it is very hard to keep both MOSFETs in saturation, especially when the input common mode can vary from rail to rail. This made me confused about the biased condition of the output FETs. I will continue searching, but it would be great if you can help me by explaining or suggesting some reading materials.
Thanks a lot.

 

[erikl]

... the NMOS fell into triode region, and I obtained only 60dB gain. Apparently, it is very hard to keep both MOSFETs in saturation, especially when the input common mode can vary from rail to rail. This made me confused about the biased condition of the output FETs.
... it would be great if you can help me by explaining or suggesting some reading materials.

Find here a description of an RF amplifier with class AB output amplifier. The used Monticelli biasing method (s. p. 18 ff) provides a stable quiescent output stage current and so avoids its triode region situation.