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Question on a Sync Buck Converter using UC3843 and LM5104M

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H_Wong

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I have design a Sync Buck Converter with its Specification listed below:
a) VIn = 16V
b) VOut = 4.2V
c) IOut = 3A
d) Fsw = 200KHz

The schematic of my design is attached in this post, named "PCB00002_1 SCH.jpg".

However, i have measured some nodes and discovered some problems listed below:

Q1) Fsw is much less than that of my design Spec requirement
The problem is listed in "Fig 2.png", attached in this post.

From "Fig 2.png",
  • The Ringing seem exist at PWM and RT/CT Signal
  • Design freq: 200k, but actual freq: about 85k

Q2: Current Sense Signal also suffers from Ringing
The problem is listed in "Fig 3.png", attached in this post.

From "Fig 3.png",
  • Current Sense Signal also suffers from Ringing
However, VDD for U1 - U4 work normally at 12V.

The graphs below are PCB Top and PCB Bottom are also attached in this post.

How to solve Q1 and Q2? Thanks a lot.
 

Attachments

  • PCB00002_1 SCH.jpg
    PCB00002_1 SCH.jpg
    243.1 KB · Views: 81
  • Fig 2.png
    Fig 2.png
    437.3 KB · Views: 84
  • Fig 3.png
    Fig 3.png
    487.2 KB · Views: 61
  • PCB Bottom.png
    PCB Bottom.png
    1 MB · Views: 53
  • PCB Top.png
    PCB Top.png
    480.5 KB · Views: 79
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You have referred the current sense signal down via a home made In Amp....but what op amps have you used?....are they high enough bandwidth to adequately convey the fast current sense signal. (actually it looks like you have chosen well here from your scopes)...but see later..

........On another look at your ISEN input of the '2843 it looks like the current sense signal does not go to zero when the fet switches off...and is above the currnt sense threshold when the oscillator wants to switch on again...so it never switches on again the 2nd time.......so is missing every other pulse......so you are seeing half frequency.

LT1243 datasheet shows you a formula to calc the fsw of the '2843.
Try changing the RTCT values and see if your fsw changes.

The noise you show on scopes is just looking like normal common mode noise picked up by the scope probe.

Incidentally If you no-load the power supply then doesnt the bottom fet just get held continuously ON by the LM5104, which would not be good news.

You sure you used UC28C43 and not the half frequency uc28c45?
____
You could try a current sense transformer instead for hi side current sense.
Or 16V to 4.2V at a few amps is nice and easy for a sepic converter with cheap uncoupled inductors...then you have only low side drive and sense,.

Though also i believe ti.com do lots of cheap sync buck controllers which could easily do your spec.....give me a shout and ill give you the list...or else just see them on ti.com yourself
 
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Reguarding Q2:
1. I think you are using way too high resistances. no need for 1Meg, 200K, 100k they are very prone to pick up noise at sensitive nodes like the non-inverting inputs of the op-amps.

2. I think you are better off using a differential amplifier instead of 2 buffers + summator.
1745128757137.png

Make R3=R5, R4=R6 and R3, R5 > 1K.
 
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DIY in amps require precise resistors to make mediocre CMRR. 5% resistor make very low CMRR. Disable the output stage and measure in amp output voltage. Q4/R19 gives some current for slope compensation but this current flow to low impedance node and does nothing.

1MOhm divider with 2pF op amp capacitance limits the bandwidth to ~150kHz or lower depending on parasitics. This op amp has GBW 2,5MHz. In amp with gain 2 should have 800kHz bandwidth.
 
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This is difference between 1M vs 10k resistors in amplifier. Looks like your bandwidth is even lower than in my simulation.
1745137890683.png
 
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You can see from the scope in top post that the OP is getting pretty good rendition of the inductor current....but when the "next cycle " is due to start, the current sense signal is still too high to allow the fet to turn on...hence OP is getting "half frequency".....It doesnt look like higher bandwidth opamp can really solve this..or rather, it doesnt look like being worthwhile to try and get increased bandwidth.....i reckon use currnt sense transformer instead.
The OP is in an issue common to many...ie doing a cost effective Buck for >1A and having to manage the high side sense.......most off the shelf chips for this are expensive, hence i can see why OP is doing home brew...but can OP get the ti.com ones which i spoke of earlier.?..they are the cheapest i ever found.

But for such low power and a conveniently high step down ratio...just go with that same '2843 and use an uncoupled SEPIC......Easy and cheap....low side drive and low side sense.
 
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cupoftea said:
You can see from the scope in top post that the OP is getting pretty good rendition of the inductor current....but when the "next cycle " is due to start, the current sense signal is still too high to allow the fet to turn on...hence OP is getting "half frequency".....It doesnt look like higher bandwidth opamp can really solve this..or rather, it doesnt look like being worthwhile to try and get increased bandwidth.....i reckon use currnt sense transformer instead.
Click to expand...
Main error is that current measurement should not work when low side switch is on. Shunt should be before high side switch.

Why I think that bandwidth is not good enough.
At time T1 current reaches 6A and this is comparator threshold voltage, at T2 current drops to 2,4A but voltage between T1 and T2 is higher than the threshold.
After 5us I don't know that current dropped this current sensing looks useless to me.
Bandwidth is limited because of 1MOhm resistors this can be fixed very cheaply. With higher bandwidth Isense voltage should drop below threshold before next cycle. But It can be not good enough for reliable operation at wide range of duty cycles.

1745147182110.png
 
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Agreed, worth a try with lower value resistors.
Though has the OP tried no-loading it and seeing if the low side fet gets held constantly on?...thus discharging the output well down.
This is the usual problem with the home brew buck shown.
 
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cupoftea said:
You have referred the current sense signal down via a home made In Amp....but what op amps have you used?....are they high enough bandwidth to adequately convey the fast current sense signal. (actually it looks like you have chosen well here from your scopes)...but see later..

........On another look at your ISEN input of the '2843 it looks like the current sense signal does not go to zero when the fet switches off...and is above the currnt sense threshold when the oscillator wants to switch on again...so it never switches on again the 2nd time.......so is missing every other pulse......so you are seeing half frequency.

LT1243 datasheet shows you a formula to calc the fsw of the '2843.
Try changing the RTCT values and see if your fsw changes.

The noise you show on scopes is just looking like normal common mode noise picked up by the scope probe.

Incidentally If you no-load the power supply then doesnt the bottom fet just get held continuously ON by the LM5104, which would not be good news.

You sure you used UC28C43 and not the half frequency uc28c45?
____
You could try a current sense transformer instead for hi side current sense.
Or 16V to 4.2V at a few amps is nice and easy for a sepic converter with cheap uncoupled inductors...then you have only low side drive and sense,.

Though also i believe ti.com do lots of cheap sync buck controllers which could easily do your spec.....give me a shout and ill give you the list...or else just see them on ti.com yourself
Click to expand...
I use TI UC3843 and the Output Current also equal to 3A.
 
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Thanks for the video...but note that he does not show it with uc3843 and with no load....unfortunately in no load, uc3843 will stop pulsing, will take lower fet ON all time...and this gives problems for operation, since it will discharge the output.
 
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...If the controller allows continuous operation in no load, then its fine...but in uc28c43, when the error voltage goes below the voltage of the 2 diodes in the uc28c43, thats it....the part just holds the lower fet off all the time...and thats where the problems happen.
But yes, i agree, in other controllers, the fets are kept switching in no load and the inductor current oscillates back and forth at the fsw, and in that case its fine.
 
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I don't understand what are you talking about. In synchronous buck inductor current ramp doesn't change at low load.
Synchronous buck power stage always operates in continuous conduction mode. Some specialised synchronous buck controllers have extra circuitry to prevent CCM at low load turning low side off. This is not possible with LM5104M.

​

 
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The LM5104 is controlled by the UC3843, and if it gives a low PWM output, ie, low all the time, to the LM5104, then the LM5104 will follow suit. And give a high-all-the-time input to the lower fet...


...looking at page 3 of LM5104..."Logic 0 equals High-side OFF and Low-side ON"

LM5104 does not give the required operation for sync buck in no load when it is receiveing a constant logic low signal from the UC3843 GATE output.

Synchronous buck power stage always operates in continuous conduction mode.
Click to expand...
...many of the ti.com sync bucks dont operate in ccm in no-load..they cleverly turn both high and low side fets off for much of the time...obviously eventually the divider will discharge the output and the synbuk will spring on again to replensih...but uc3843 has no such niceities.
 
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1) Regarding the Fsw discrepancy, it looks like the oscillator frequency isn't far off (around 170kHz). But based on your waveforms it looks like you are actually using either the UC3844 or UC3845, which only produce PWM pulses every other cycle. Maybe that's okay if you won't need to operate with duty cycle over 50%. You can just double the oscillator frequency to 400kHz to get fsw of 200kHz.

2) Regarding the "ringing," the ringing shows on all voltage waveforms, so it's just typical switching noise being picked up by the oscilloscope probes, it's not "real".

Some other comments on the current sense circuit:
1. Your schematic shows the RC filter R25 and C14, which seems to be for sensing current using the inductor DCR. But you also have current sensor R3. Which one are you actually using?
2. The value of R3 is 0.25ohms, seems very high for sensing 3A. It would dissipate 15% of your output power at full load. A value of 0.05ohm or less would be advisable (with more gain from the current sense amplifier).
3. Your current sense waveform shows a lot of lowpass filtering. Typically you want the current sensing to have fairly high bandwidth, especially if it's being used for peak current mode control.
3. If you use current sense resistor R3, then there is no need for U3A and U3B and the 1M resistors. You can connect R17 and R15 directly to R3.
4. Using a dedicated instrumentation amp or current sensing amp would probably work much better, maybe you have reasons for using
5. It looks like you're trying to inject some of the ramp waveform into ISENSE (with Q4 and R19). But this won't work, since the output of U4B is low impedance. If your intent is to do slope compensation, then it's probably not necessary since your duty cycle is below 50%.
 
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cupoftea said:
...many of the ti.com sync bucks dont operate in ccm in no-load..they cleverly turn both high and low side fets off for much of the time
Click to expand...
That makes them non synchronous buck at low load.
cupoftea said:
uc3843 has no such niceities.
Click to expand...
#1 project works as synchronous buck all the time, so only CCM is possible.
cupoftea said:
LM5104 does not give the required operation for sync buck in no load...
Click to expand...
Why do you think that non synchronous operation is required for synchronous buck?
This is a power saving feature, may be implemented, but without it nothing bad happens.
 
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I think, basic problem of the design is that UC3843 current mode controller isn't suited to control the output current of a push-pull buck converter. It might work better if Vcs is only derived from Q1 current. Q2 current can't be controlled by UC3843 anyway.

Observed output switching at 1/2 fosc is subharmonic operation if I understand right, caused by unsuitable current control topology.

I don't see a way to turn the design into a reliable synchronous buck controller that can handle all possible load conditions.
 
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