question of usb2.0 PHY's clock

[showtime]

usb2 clock

which clock is working in digital part (like bit stuff,NRZI encode)?
480M or 60/30M?
8O

 

[ME]

usb2.0 phy

You can find "USB System Architecture (USB2-0).pdf" here hxxp://www.mcu.cz/atm/index.php?&direction=0&order=&directory=eBook
Maybe you can find some information in this book.

 

[ME]

usb2.0 phy design

You can try some of these USB resources as well.

 

[andy2000a]

usb2 phy design

USB2 PHY will convert 480M -> 30/60M clock (UTMI), but in PHY block
some logic in High speed , like data_receiver ==> 480M (layout carefully & y man ) , and some block convert 480M --> parallel 60M ...
then goto UTMI block

 

[showtime]

usb2.0 phy

where can I find usb2.0 phy's RTL code?

 

[andy2000a]

usb phy high speed question

PHY is analog , only UTMI(in PHY) is logic , and you can not find it ..
USB2 design is very expensive .... and it is ver HOT product
you can not get any USB2 PHY circuit or RTL code ...
as I know NEC sold USB host cost $300000 (USA dollars)
very very expensive ..
other Company PHY IP is cheap , but usually have many BUG ..

 

[sunjimmy]

usb2.0 + crc

Hi,

Could someone provide the models of USB2.0 cable for PHY design ?

Thanks in advance : )


sunjimmy

 

[showtime]

cypress usb2.0 phy

where can I find some resource about CRC parallel-implementation?
Thanks in advancd!!^_^

 

[Masterpiece]

usb2.0 design blocks

Hi,

Try this one from Cypress.

**broken link removed**

 

[philiphsu]

usb2.0 phy digital design

which clock is working in digital part (like bit stuff,NRZI encode)?
480M or 60/30M?
8O

all the CLK are used for different blocks.

 

[andy2000a]

utmi phy

USB2 PHY maybe have other topology .. for our design is
use UTMI interface for Logic ..

in PHY internal logic (Data recovery use 480M )

outside this PHY is UTMI

 

[visualart]

usb phy site:edaboard.com

It is 480M, in the stiff anf NRZI