kannan2590
Member level 4
The question is how to use dsp 48 slices in vhdl code.I am using virtex 4 fpga.Is dsp 48 an ip core in xilinx software
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usually
a <= b * c;
does the trick.
* is a multiply in VHDL. It should infer a DSP slice when synthesised.
you could instantiate a multiplier block, or directly instantiate a DSP48 block primitive.
Use the unisim library. What kind of detail are you after? can you tell use why you want to do this and not just infer a multiplier like I origionally said you could do?
If you are looking for VHDL help, I suggest you read a VHDL tutorial, specially on instantiating an entity.