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question about PLL with separate gnd/vdd

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yaly

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hello everyone,
I'm a newer to IC design and this is my first topic here.
I designed a PLL ,and in the simualtion separate ground and power (say gnd2 /vdd2) are used for VCO and chargepump in order to minimize the noise from digital citcuit such as PFD and divider.When i do the layout,many Psub pickups are used beside the VCO devices for perfect grounded,and they are connected to gnd2 line. However ,the gnd line ( the ground line of digitsl parts) is also connect to sunstrate. Does that mean gnd and gnd2 are connected together? How can i do my layout to achieve a "real" separate gnd2?

Thanks for any insights!
 

Hughes

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In standard Nwell well bulk CMOS technology, you cannot separate gnd and gnd2. They are always connected together by the psub. However, an nwell donut around the VCO helps separate gnd and gnd2 during layout extraction.
 

yaly

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thanks Hughes, i use only separate VDD now and the next XX hours i will being redesigning the layout -:(
 

shawndaking

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SOME VENDORS IMPLEMENT 0 OHM RESISTOR OR FERRITE BEADS TO SEPERATE
PLL DIGITAL/ANALOG GND AND VOLTAGE.

THE IDEA BEYOND THE DIRECT CONNECTION IS ELECTRICALLY SIMILAR TO
THE 0 OHM APPROACH BUT GIVE YOU MORE BENEFITS LIKE LESS DS ATTENUATION, AND ABILITY TO PASS SIGNALS ABOVE AND BELOW THIS
CONNECTION AND NOT THROUGHT PLANE SPLIT.

THE DISSADVANTAGE IS YOU CAN'T CHANGE ANYTHING LATER BECAUSE IT'S A LAYOUT CONNECTION. IN THE 0 OHM/FERRITE APPROACH YOU CAN REPLACE RESISTOR, OR PUT SEVERAL RESISTORS, AND PICK THE ONE THAT IS LESS NOISY TO YOUR SYSTEM.
 

Ruritania

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Hughes said:
In standard Nwell well bulk CMOS technology, you cannot separate gnd and gnd2. They are always connected together by the psub. However, an nwell donut around the VCO helps separate gnd and gnd2 during layout extraction.

Hi,

I have the same problem, could you pls explain a little more on the "nwell donut"? and will the voltage which tie the nwell to vdd affect the VCO or other high freq. parts on chip?

Rgs
 

Japp

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yaly said:
thanks Hughes, i use only separate VDD now and the next XX hours i will being redesigning the layout -:(

No, Don't redesign!
The 'donut' is just a trick to make the layout extractor think that the grounds are separate!
So (as mentioned) the actual physical ic will have a common substrate (bulk), and therefore a direct connection will exist between the two different grounds (through the psub contacts) but if you draw a thin nwell all the way around your vco (with no openings anywhere) then (most) layout extractors interprete the psubstrate inside the drawed nwell as a separate ground than the rest of the layouts (outside the nwell border).
So you can have multiple grounds, as long as you draw a nwell around the different circuits (so if you had an intension of adding some guardrings around your blocks, just make a part of it an nwell).
 

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