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question about PLL jitter

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semitao

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Hi,all.
Who can tell me how to simulate the PLL jitter? When analyze the phase noise of VCO, we can use the Pnoise in spectre. I don't know how to analyse the noise from charge pump & PFD, anyone can help me?

Thanks in advance.
 

As I know,

In-band noise of charge pump PLL is roughly seperate two mechanisim.
First one is charge pump mismatch, and the other is leakage problem.

Ideal charge pump PLL has infinite dc gain.
If locked, PFD inform any signal to charge pump in ideal, But real circuit level PLL
inform to charge pump minimum pulse-width which means avoid PLL dead zone.

You can estimate or simulate your PLL circuit by open loop locked conditions.
PFD two input signal - Reference and Feedback- put the same phase and frequency and confirm the minimum pulse width of PFD to avoid dead-zone.
and simulate loop filter voltage.
Ideal PLL has no variation of Voltage of Loop filter. But real Circuit has some variation.
The goal of above method is finding a minimum voltage variation of loop filter.
Loop filter variation directly affect the VCO Phase noise.

If you any question about that feel free to contact me by E-mail.

Thanks!!!
 

Hi, just take a look on this article..

Code:
http://www.sigcon.com/Pubs/news/3_22.htm
 

Thanks,guys,
I am puzzled with how to select the charge pump current. As we know, the higher values of charge pump current lead to lower output phase noise. But the large current is limited by how large of capacitor values can be realized in the the loop filter implementation.
So, I have to decrease my pump current to get smaller capacitor, but I can't simulate the phase noise of detector to check the effect of new pump current. What can I do?
 

Try to read this article hope this can solve your problem..
 

I think the phase jitter produced by VCO shoud be concerned about first.
Pump current is a system parameter.Please take care!
 

How much is charge pump current as usual?
1ma is big or not?
thanks
 

1 mA is high , usuallay use 10 to 100 uA

khouly
 

How about 2uA?
If I use 10uA, my capacitor is very large,and I don't want to change my bandwith.
 

Why? Can u tell the relationship between small pump current and detector phase noise?
thanks in advance.
 

Which type loop filter that you use?
 

Type II, Order 2 passive filter.
Does the type of loop filter affect?
 

Maybe the cpum current depends on the loop bandwidth. If the bandwidth is quite small, 2u is OK.
Otherwize, with the same small current, the ways to increasing the bandwidth are enlarging Kvco and R. As we know, large Kvco causes large jitter due to the litter wave on VCONT and large R causes large thermal noise at the 3db frequency point.
 

LPF-> output phase noise bandpass filter
VCO-> output phase noise highpass filter.
The vco phase noise is mainly reason on common.
 

how to estimate or simulation the power supply noise?
 

I dont think you can estimate that...you can simulate it however
 

hi guys, i was wonder how to measure the jitter also..... can anyone show the schematic diagram and setting to measure the jitter with cadence - Analog enviroment?
 

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