Question about phase noise simulation of ring VCO

[wany]

I design a Ring VCO and use Cadence pss pnosie simulate its phase noise. There is a strange simulation result. The phase noise curve is not always down with -20dBc /dec. From 100KHz the curve become a straight line . See belowing pic. I don't

 

[saro_k_82]

Well this could happen if the thermal noise of the buffer stage is huge., BTW do you know that you are plotting the phase noise of the 10th harmonic?

 

[wany]

The PSS and Pnoise simulation is setting Relative harmonic 10. What is wrong with this setting？ Thermal noise is high. But the current of VCO is only 1mA.

 

[saro_k_82]

Too few details. What is the architecture of the VCO, what is the output frequency?
You need to look at the relative harmonic=1 to get the fundamental's phase noise. (Number of harmonics can be anything., It has to be high for faithful PSS time waveform.,).
We dont know much about something happening around 10 times the VCO frequency.