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question about middlebrook gft (general feedback theorem)

akbarza

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hi
i am reading a pdf file with name:
THE GFT: A GENERAL YET PRACTICAL FEEDBACK THEOREM
R. David Middlebrook
( if search net, you can find it easily).
i am familiar with extra element theorem(eet) of middlebrook and zeet.
in related articles, often eet and zeet is used for impedance and not for voltage or current source generator.
in above mentioned article,
in page 8 is written:
If an “extra element” is an impedance Z, each contains
the ratio of Z to a certain driving point impedance seen by Z. If the extra element is a
controlled generator, such as Ai in Fig. 5(b), the denominator contains the ratio of
Ai to the negative of a return ratio seen by Ai, evaluated with the input ui set to
zero; the numerator contains the ratio Ai to the negative of a return ratio seen by Ai
evaluated with the output uo nulled.
can you explain it to me?how eet is used for current or voltage source ?
thanks
 

LvW

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What is your final goal? Loop gain simulation?
 

akbarza

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hi LVW
YES , MY FINAL GOAL IS TO SIMULATE LOOPGAIN.
i saw in a ltspice file about calculating loop gain with a strange formula. i wanted to know that how the formula was obtained, so i started to read the above mentioned file.
but in it, eet is used with current and voltage generator, so i wanted to know if anyone is familiar with using eet or zeet with current generator or voltage generator.
thanks for responce
 

sutapanaki

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If I'm not mistaken in the book of Vatche Vorperian "Fast analytical techniques..." there is something written about dealing with controlled sources. I personally have never had the need to treat the controlled source as extra elements.
 

FvM

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Are you referring to the LTspice educational examples GFT, loopgain and loopgain2? Your questions can be better understood with a clear reference.
 

akbarza

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Are you referring to the LTspice educational examples GFT, loopgain and loopgain2? Your questions can be better understood with a clear reference.
hi FVM AND THE OTHERS
i read( watch and run )the files in ltspice before, but i could not understand them. two questions arise:
which test signal( current or voltage or both)must be used?
and where this( or these) test signal(s) must be added?
 

LvW

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hi FVM AND THE OTHERS
i read( watch and run )the files in ltspice before, but i could not understand them. two questions arise:
which test signal( current or voltage or both)must be used?
and where this( or these) test signal(s) must be added?
When you need the loop gain, you must open the loop at a suitable point.
"Suitable" means: If possible, it should be a point where a low-impedance output node meets a high-impedance load (example: Opamp ouput or opamp input). In this case, it would not be necessary to mirror the (missing) load and you can use a test voltage source only between both nodes at the opening.
Only in case you cannot find such a node you should use Middlebrooks method (double injection), which can take the disconnected load into account.
For finding the loop gain function you must combine both simulation results with the formula provided by Middlebrook.
 

LvW

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I forgot to mention that it is also possible to determine the phase margin bypassing the previous loop gain simulation.
An ac analysis of the closed-loop function can give you also this information.
These methods (one is approximate and the other one correct) should be applied if (a) it is not easy to find an "appropriate" node for opening the loop or (b) the Middlebrook method is too complicated (necessity to combine two separate simulation runs)
 

akbarza

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I forgot to mention that it is also possible to determine the phase margin bypassing the previous loop gain simulation.
An ac analysis of the closed-loop function can give you also this information.
These methods (one is approximate and the other one correct) should be applied if (a) it is not easy to find an "appropriate" node for opening the loop or (b) the Middlebrook method is too complicated (necessity to combine two separate simulation runs)
hi Lvw
is it possible to explain more? with close loop simulation, how i can find phase margin?
for #8 , i can not understand the meaning of : where a low-impedance output node meets a high-impedance load
can you give more information?
thanks for answering.
 

LvW

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OK - my knowledge of the english langiage is not the best. The meaning of this sentence is: Where a source with a relatively low source resistance is connected to a load which has a comparable high input resistance (for example: at least factor 50...100 between both resistances,) In many cases, this requirement can be fulfilled when you open the loop at an opamp output or at one of its input nodes.
Regardng the closed-loop analysis, I will answer some time later (short in time atr the moment)
--- Updated ---

Regarding phase margin PM:

1) An approximate value for the PM can be found when we evaluate the phase function slope for the closed-loop transfer function in the vicinity of the dominating pole frequency wp (ac analysis). This slope will be negative for stable systems, positve for unstable systems and infinite at the stability limit (PM=0). When we express this slope using the group delay (negative derivative of the slope) , the following formula gives a rather good approximation (tau_p: Peak value of the group delay at the pole frequency wp)

PM=100/wp*tau_p.

The exactness of this equation goes up for rather small margins (where the exactness is more important than for large margins).

(If the pole frequency wp is not known, you can use the frequency w_peak where the peak value tau_p occurs).

2.) In the following link an article is given which describes how to use the closed-loop phase slope for exactly calculating the phase margin.


(I hope the link works..)
 
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LvW

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Published Dec 2012: Circuits, Systems and Signal processing, Vol. 31, No 6.
 

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