question about low power LDO

[alasliu]

dear all i want to design a low power LDO. but i dont know which structure to use.
thank you

 

[raduga_in]

can you please elaborate your targeted specs ?

 

[gevy]

You can use structure with power PMOS transistor.

 

[alasliu]

thanks
LDO used in soc
0-20mA transient response
dip< 50m
PSRR > 40dB at 1M
about 1uF ceramic cap

Added after 59 minutes:

have used PMOS

 

[raduga_in]

I see that the PSRR specs are quite tight .. what is the
min droput voltage ?

 

[alasliu]

no

Added after 4 minutes:

please giveme some advice thank you

 

[jt_rf]

which spec are u facing problem?
what is quiescent current?

Added after 1 minutes:

if ur load is also on-chip, then external cap will be of not much use!