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Question about low capacitance 'mimcap'

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Ravinder487

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Hi all,
I've designed SAR ADC in gpdk_090 CMOS.I've used 5fF capacitors('cap' cadence ) in my DAC.Now I want to replace these capacitors with 'mimcap' so as to simulate real world capacitor.But the problem is that minimum capacitance of 'mimcap' I can use is 27fF .Is there any other way to get smaller capacitances?
 

Re: Question on 'mimcap'

our company minimum capacitance is also 27fF, minimum width and length are all 5um. so there is no way to get smaller capacitances. i think.
 

Re: Question on 'mimcap'

our company minimum capacitance is also 27fF, minimum width and length are all 5um. so there is no way to get smaller capacitances. i think.
In a paper I've read he is using 5fF capacitances in 0.13um technology. Mine is finer technode(90nm) than he is using. why don't I've smaller capcitances. As we move to finer technologies we use 'lithography' with finer resoultions hence as technology shrinks we should be able to get smaller capacitances.
 

Re: Question on 'mimcap'

check ur pdk and find the capacitance per unit area. most process target 1fF/um2 in which 5fF is possible. lower nanometer process tend to have stacked mim-caps which have higher minimum cap. ur process option may be a factor. check with foundry for all the options .
 
Re: Question on 'mimcap'

Connect some large caps in series( not a usual way) or use MOS cap. However MOS cap would have to be biased at strong inversion to avoid C-V variation.
 

Re: Question on 'mimcap'

Design and layout by yourself for smaller unit mim cap.
 
Re: Question on 'mimcap'

Design and layout by yourself for smaller unit mim cap.
Then how to avoid errors in LVS as there is no option to place 5fF 'mimcap' in schematic...!!!!
If my process is demanding a minimum capacitance to be used, won't there be any problems if I use smaller capacitances??
 

Re: Question on 'mimcap'

smaller mimcaps might not be an option if
- will violate serious DRC rules (impacting manufacturing)
- will increase mismatch beyond what you can tolerate in the design

If you are not going to fabricate the device and want just to see what happen, you can:
-use series caps
OR
-copy the foundry mimcap to another library and edit its cdf so it stops imposing a minimum size
OR
-copy the foundry model for mimcap and alter it e.g. divide the size by 5

If you are going to fabricate
- why is it an issue to rescale your caps to the minimum?
 
Re: Question on 'mimcap'

copy the foundry mimcap to another library and edit its cdf so it stops imposing a minimum size
How to edit its cdf?
- why is it an issue to rescale your caps to the minimum?
Sorry, I don't understand this statement!!
 

Re: Question on 'mimcap'

Pls copy a symbol from capacitor in analog lib and generate mim symbol.
To edit CDF, Tools->CDF->Edit
Pls use base option.
It is Cadence.
Then how to avoid errors in LVS as there is no option to place 5fF 'mimcap' in schematic...!!!!
If my process is demanding a minimum capacitance to be used, won't there be any problems if I use smaller capacitances??
 
Re: Question on 'mimcap'

How to edit its cdf?

Sorry, I don't understand this statement!!

leo_o2 has taken care of the first item, as of the second: won't your DAC design still work after scaling up its caps by around 5 times (27f/5f)?
 

Re: Question on 'mimcap'

won't your DAC design still work after scaling up its caps by around 5 times (27f/5f)?
Ratio of Maximum to minimum capacitance is 4 in my DAC. Sample&Hold circuit(Nakagome Charge-pump based) can drive a maximum capacitance of 25fF. This forces capacitance of smallest capacitor to be 5fF.
 

Re: Question on 'mimcap'

Physically, you can also build a "capacitor" from two stacked metals. These have bigger distance than the MIM metal, so you can easily reach smaller capacitance values. The metal-to-metal capacitance per area is defined in the process specification data sheet.

But I do not know if your workflow allows such "handmade" capacitors.
 

Re: Question on 'mimcap'

Thanks volker_muehlhaus,I think this will solve my problem!!!

This requires your DAC design to be quite insensitive to the mismatch in your caps... (those would have been true also for the 5fF mimcaps -those being quite small). Have you taken this into account?
 
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