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Question about lookup table in VHDL

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EDA_hg81

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lookup table vhdl

I want to find an efficient way to build the compact lookup table inside FPGA based on following code:
Currently I detect all input 64 formats by using “if” and “elsif”, but this way is too timing consuming.

If I use ROM to build the lookup table, so much memory space is going to be wasted

Do you have any idea about how to build a much more efficient and compact look up table inside FPGA?

Code:
Case state is 
When idle     =>
if    ( trigger = '1' and formatdata( 31 downto  28) = x"6" and formatdata( 27 downto 16)  = x"4D3"  and x"06c8" >= formatdata( 15 downto  0 )     and formatdata( 15 downto 0 ) >= x"06C6")then
 ………………………………..
elsif    ( trigger = '1' and formatdata( 31 downto  28) = x"6" and formatdata( 27 downto 16)  = x"4D3"  and x"06c8" >= formatdata( 15 downto  0 )  and formatdata( 15 downto 0 ) >= x"06C6")then
………………………………..
end if;
When output   =>
……………………
When others   =>
…………………...
End case;
Very appreciate for you suggestions.
 

FvM

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what is (look-up) table in vhdl

but this way is too timing consuming
Any indications for this assumption? The FPGA compiler is minimizing the decoder logic and implements it in logic cells. This is generally the fastest way to implement the decoder.

Because your input vector is 32 bit size, it effectively can't be decoded by a ROM table without previous minimization.
 

    EDA_hg81

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EDA_hg81

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how to make look-up table in vhdl

I have changed to the following:

Code:
 case checker_state is
                when checker  =>
                     ack_reg        <= '0';
                     resetformat    <= '0';
                     if ( trigger = '1' )  then
                        case formatdata is
                             when x"64D206C6"  => format_reg := 1;
                             when x"64D206C7"  => format_reg := 1;
                             when x"64D206C8"  => format_reg := 1; 
                             when x"64D306C6"  => format_reg := 1;
                             when x"64D306C7"  => format_reg := 1;
                             when x"64D306C8"  => format_reg := 1;      
                             when x"345D0779"  => format_reg := 2;
                             when x"345D077A"  => format_reg := 2;
                             when x"345D077B"  => format_reg := 2;
                             when x"345E0779"  => format_reg := 2;
                             when x"345E077A"  => format_reg := 2;
                             when x"345E077B"  => format_reg := 2;
                             when x"644007AE"  => format_reg := 3;
                             when x"644007AF"  => format_reg := 3;
                             when x"644007B0"  => format_reg := 3;
                             when x"644107AE"  => format_reg := 3;
                             when x"644107AF"  => format_reg := 3;
                             when x"644107B0"  => format_reg := 3;
                             when x"34E106A9"  => format_reg := 4;
                             when x"34E106B0"  => format_reg := 4;
                             when x"34E106B1"  => format_reg := 4;
                             when x"34E206A9"  => format_reg := 4;
                             when x"34E206B0"  => format_reg := 4;
                             when x"34E206B1"  => format_reg := 4;
                             when x"342307E4"  => format_reg := 5;
                             when x"342307E5"  => format_reg := 5;
                             when x"342307E6"  => format_reg := 5;
                             when x"342407E4"  => format_reg := 5;
                             when x"342407E5"  => format_reg := 5;
                             when x"342407E6"  => format_reg := 5;
                             when x"33A308F6"  => format_reg := 6;
                             when x"33A308F7"  => format_reg := 6;
                             when x"33A308F8"  => format_reg := 6;
                             when x"33A408F6"  => format_reg := 6;
                             when x"33A408F7"  => format_reg := 6;
                             when x"33A408F8"  => format_reg := 6;
                             when x"63A508F6"  => format_reg := 7;
                             when x"63A508F7"  => format_reg := 7;
                             when x"63A508F8"  => format_reg := 7;
                             when x"63A608F6"  => format_reg := 7;
                             when x"63A608F7"  => format_reg := 7;
                             when x"63A608F8"  => format_reg := 7;
                             when x"444007AC"  => format_reg := 8;
                             when x"444007AD"  => format_reg := 8;
                             when x"444007AE"  => format_reg := 8;
                             when x"444107AC"  => format_reg := 8;
                             when x"444107AD"  => format_reg := 8;
                             when x"444107AE"  => format_reg := 8;
                             when x"631A0A83"  => format_reg := 9;
                             when x"631A0A84"  => format_reg := 9;
                             when x"631A0A85"  => format_reg := 9;
                             when x"631B0A83"  => format_reg := 9;
                             when x"631B0A84"  => format_reg := 9;
                             when x"631B0A85"  => format_reg := 9;
                             when x"332008F4"  => format_reg := 10;
                             when x"332008F5"  => format_reg := 10;
                             when x"332008F6"  => format_reg := 10;
                             when x"332108F4"  => format_reg := 10;
                             when x"332108F5"  => format_reg := 10;
                             when x"332108F6"  => format_reg := 10;
                             when x"332008B4"  => format_reg := 11;
                             when x"332008B5"  => format_reg := 11;
                             when x"332008B6"  => format_reg := 11;
                             when x"332108B4"  => format_reg := 11;
                             when x"332108B5"  => format_reg := 11;
                             when others       => format_reg := 4095;
                        end case;
                        checker_state  <= ckredund;
                     end if;
                when ckredund   =>
How do you think this style, if this style has the same working efficiency as last one?
Thanks.
 

FvM

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lookup table in vhdl

How do you think this style, if this style has the same working efficiency as last one?
Yes I think so, provided, the expressions are equivalent. You can check, if you compile it with a FPGA hardware compiler, e.g. A.ltera Q.uartus and compare the consumed logic resources.
 

    EDA_hg81

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EDA_hg81

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vhdl lookup table

Do we have any other structures which can save resource for lookup table by VHDL?

Thanks.
 

tlp71@hotmail.com

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look up table in vhdl

yes, you have.
you can use a ram module.
 

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FvM

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lookup table fpga

you can use a ram module
Yes, generally. In the present case, there may be an issue of too many input bits, as previously discussed.
 

    EDA_hg81

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