Ques on coupling effect and optimization for buffer design

[richloo]

Hi guyz,

We have seen coupling effect takes place everywhere in a fast switching single ended buffer circuit. Any material about how to counter the coupling effect?

I am currently designing a buffer. How do we actually optimize for the coupling effect between bias generator and the pad seen by the driver's circuit? How do we design the transistor size until the coupling effect becomes dominant?

Thanks in advance.

 

[chang830]

Re: Ques on coupling effect and optimization for buffer desi

The main adverse effect from the switching buffer is substrate coupling and vdd/gnd bounce from finite impedence of package. So in designing the buffer, below methods maybe helpful.

1.in layout, seperate the analog and digital vdd/gnd for your mixed block
2.add guardring and DNWELL for substrate coupling
3.reduce the bonding wire in package to reduce the parasitic inductor
4.optimize your buffer design to reduce the peak di/dt for the buffer
5.good PCB layout also help to improve

The transistor size is determined by the rise/fall time requirement with your load capacitor, you should resort to othet methods to reduce the coupling effect.