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Query regarding fliker noise modelling

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yalanand

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Why is flicker noise modelled as serise voltage source connected to gates in op-amp noise analysis?
 

it is additive in nature and also if it is in parallel then it would become zero when the source is shorted and this does not coincide with the practical case....

generally any noise is modelled as a voltage source in series and a current source in parallel but sometimes only one is used....
 

My query is not why series but why at the gate side ?
 

because gate voltage controls the current through the MOS and hence flicker noise contribution is modelled as a voltage and at the gate....
 

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