Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Query regarding Delay element in the circuit.

Status
Not open for further replies.

shaikss

Full Member level 4
Joined
Jun 18, 2007
Messages
229
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,298
Activity points
3,319
Folks,

I have a query regarding the attached circuit.
In order to design a rectifier, I was trying different structures.

So, I started with the attached circuit without delay elements.
I have used a cap at the NMOS, so that the cap will gets charged. But I don't want the cap to discharge its energy.
When I don't use delay elements, the capacitor has discharging path and so my output was not good

When I use delay of 0ns or 0.1ns or whatever value, delay element is working as a isolator.
I see reasonable output even at 180mV. But the settling time is still high.

Can you please let me know what can be done so that cap doesn't discharge?



Thanks!!
 

Hi,

There is no circuit attached...Pls repost...
 

What's the purpose of using circuit elements that aren't available in IC design?

You should better analyze the weaknesses of the circuit thoroughly and understand, how design concepts from literature are avoiding it.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top