Q01 – Voltage to Phase Shift?

[KerimF]

Hi

Sorry, my fault to not understand your informations .. and that i can´t follow your switching topics.

I won´t bother you again.

Klaus

Hi,

You didn't do anything wrong. It was just a mutual misunderstanding (also from my side). And this happens in best families

But truth be said, I also thought that I was breaking a rule which I am not aware of.

For example, I started lately a thread, and no one seemed to have an answer. This proved me that it is likely about a novel idea. So I thought, in case this thread will become a thing of the past, it will be more useful for the members if I will present its idea on a blog instead. But our friend FvM notified me that once a thread starts it cannot be deleted (unless the one who wrote it is banned ) in order to be replaced by a blog. Naturally, this sounded weird to me, but I also believe that, whenever I am a guest, I have no choice but to consider every house's rule as if it were from a Holy Book which has to be supervised and protected, at any cost, by its faithful believers. Am I exaggerating

Regards,
Kerim

 

[BradtheRad]

We tend to expect discussions to be closed-ended (oriented to problem-solving), when the topic is about answering a need in a project.
We'll stay light-hearted as the discussion becomes an open-ended one, since your concept turned out to be novel and having more than one approach.

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This tactic may be of interest for varying voltage in order to adjust the time delay.

Send your 500kHz clock signal through a capacitive integrator containing a photoresistor (CdS cell, etc). Apply voltage to turn on an led mounted next to the photoresistor. By making the led dim or bright, it causes the photoresistor Ohm value to change, creating an adjustable time constant (delay). Pass the waveform through a Schmitt trigger to output a square wave.

Falstad's animated interactive simulator contains a photoresistor. Its resistance changes as you move the slider (Light Brightness) at right.

Free to download and use at:

Falstad.com/circuit

 

[D.A.(Tony)Stewart]

Sanity test on your specifications:

250ps -/+ 100ps. In order to modulate ampltude with delay, the slew rate must be specified.
If we assume the 10 to 90% risetime is equal to Tr=200 ps modulation, we can compute the -3dB BW from f= 0.35 /Tr .
BW=f 0.35/0.2ns = 1.75 GHz.

It is possible to create a voltage control delay line using varicaps but any active parts and PCB must also be suitable for this bandwidth DC to ~2 GHz.
Applications that achieve this span tend to be difficult to make inexpensive or simple.

 

[KerimF]

Send your 500kHz clock signal through a capacitive integrator containing a photoresistor (CdS cell, etc). Apply voltage to turn on an led mounted next to the photoresistor. By making the led dim or bright, it causes the photoresistor Ohm value to change, creating an adjustable time constant (delay). Pass the waveform through a Schmitt trigger to output a square wave.

This is a good approach to also think of.
I guess the photoresistor in the opto-isolator is a small light dependent resistor (LDR). In general, an LDR has a relatively slow response which, in turn, is not linear (besides the non-linearity of the LED). So, I wish I can buy such type of isolator (I just have the ones which control an output transistor or triac) to test it in real. But this won't prevent me looking for a datasheet to have an idea about the possibility to apply its control in the DSB-SC demodulator.

--- Updated Apr 6, 2023 ---

We tend to expect discussions to be closed-ended (oriented to problem-solving), when the topic is about answering a need in a project.
We'll stay light-hearted as the discussion becomes an open-ended one, since your concept turned out to be novel and having more than one approach.

Hi,

Sorry, I am not sure of which concept you were referring to. And, as you said, there may be many approaches to solve a problem (even in math). But each of them has its pros and cons. Therefore, the more approaches an engineer knows the more he has the chance to choose from them the optimum one for his application.

So, when I asked: "How Do You Measure Bs, Br and Hc for Simulating an Unknown Non-Linear Iron Core?", it turned out that no one seems hearing the simple method I presented or perhaps knowing a simpler one to get these 3 parameters for simulation. But I am patient, and we will see both how no one, mainly among the gurus , will give a reference about it if not about a better one in term of simplicity and accuracy (assuming that its thread (below) didn’t become a thing of the past yet).

How Do You Measure Bs, Br and Hc for Simulating an Unknown Non-Linear Iron Core? | Forum for Electronics (edaboard.com)

Please note that I also understand that a moderator, if not an ultimate powerful judge, has no choice but to be 'limited' by the rules he is supposed to apply on others (self-enslaving). So, as a philosopher I even concluded, since I was teen, that the best image of the Will behind my existence doesn't (or has no reason to) limit itself by any sort of law/rules to be imposed on humans. But, on the other hand, imposed rules which are naturally based on the human instincts (the pre-programmed instructions embedded in the living human body) are very important to run the material world (and international forums). I mean, you will never see me complaining against any rule or even resisting evil. In my life, I simply let the dead bury their dead. For example, deleting what I wrote here will be just a clear sign to me that I have to leave in peace instead of disturbing the peace of some others around here for being just a loving human-being instead of being a powerful master or a powerless slave (Yes, I lived this situation many times in my life, not just in forums well-known universally).

Best regards,
Kerim

--- Updated Apr 6, 2023 ---

250ps -/+ 100ps.

150ns -/+ 100ns... right?

 

[D.A.(Tony)Stewart]

--- Updated Apr 6, 2023 ---

150ns -/+ 100ns... right?

I see you changed your delay modulation specs but still have not defined signal bandwidth and many other parameters, which limits how to design.

For example, 1 stage all-pass filter, where the delay is the derivative or the slope of phase shift vs f is constant over one decade only. So specifying design assumptions are critical to any question and not relevant are faith or old beliefs.

The Falstad site is full of free simulators for time or frequency mode and may be used offline with many standard designs such as the all-pass filter. There are no country restrictions.

Digital delay solutions are very common like the ones we used in HDD's in the mid 80's to simulate random noise with early, nominal and late bits for measuring bit error rate of a HDD in a system with its own SERDES or data clock separator. The concept used digitally-selectable delay lines from 0 to 50 ns to measure "Window Margin" and then extrapolate Bit Error Rate (BER) in one second rather than wait hours, weeks or a month for an error. There were many ways to generate this and this method was also used to prevent media-induced bit-shift in the inner cylinders by using selective "pre-compensation" bit shift during the Write process.

 

[KerimF]

I see you changed your delay modulation specs but still have not defined signal bandwidth and many other parameters, which limits how to design.

You are right. My bad I had to ask this question on the thread:

Prj01 - A Simple Reliable Double Sideband Suppressed Carrier (DSB-SC) Demodulator

To those who are interested in AM communications, I attached below LTspice files which introduce the simplest reliable analogue AM demodulator. It works for all modulation indexes; from m=0 (no modulating signal) to infinity (no carrier). It uses one PLL (not two PLLs in quadrature as in Costas...

www.edaboard.com

On the schematic of this demodulator, as I mentioned earlier on post #4, R7 and C5 (at CD4066) provide a fixed delay to the squarewave of the recovered suppressed carrier, F_carrier, in order to compensate the loop error phase. This error phase is 1/8 of the carrier period (Tc). when VCO_in=2.5V (that is when the suppressed carrier frequency equals half the VCO one, in this particular DSB-SC demodulator).
But, during the lock state, this error phase could have a value between 0 and 45 degrees, 0 to Tc/4, when the carrier frequency or the VCO mid-frequency shifts from its nominal frequency (here 455 KHz, the AM IF, and 910 KHz respectively). And this decreases the synchronous detection gain that recovers the transmitted audio signal.

So, I just had the idea if it is possible to control (linearly) the R5/C5 delay by the voltage of VCO_in (after being buffered. filtered and adjusted) to compensate always the PLL's error phase.
But truth be said, this is not important, speaking practically. This gain variation wasn't noticed in a voice transmission when I used the DSB-SC system in the 80's (for many years) in my private short-range RF links (about 3 km). I deliberately varied the frequency of the suppressed carrier over many channels on MW band (about +/- 30 KHz, at a rate of 6 Hz) so that the MW listeners hear sort of noise interference when a conversation was in progress (no RF signal during silent period which is one of the advantages of the DSB-SC system).

For instance, in well-organized forums as the one here, I try my best not to break a rule. I didn't ask this question on the demodulator thread because I expected to hear that I am changing the topic and I have to open a new thread for it... and this is what I did

 

[KerimF]

Post #1:
Let us assume we have a squarewave of period T=2us (500 KHz) and a voltage (Vctrl) which could vary from 1.5V to 3.5V (2.5V -/+ 1V).

Is there a simple analog circuit which can delay this squarewave 150ps to 350ps (250ps -/+ 100ps) by Vctrl?

Thank you.

Kerim

Correction:
I am very very sorry... only now I discovered my silly mistyping ('pico' had to be 'nano') on my 1st post which confused many members
150ps to 350ps (250ps -/+ 100ps) 150ns to 350ns (250ns -/+ 100ns).

By the way, this topic is somehow solved, thanks to many interesting comments and remarks. I just liked to correct my 1st post.

"Being late is better than... " (I am not sure how to complete it in English ).

Kerim

 

[D.A.(Tony)Stewart]

Correction:
I am very very sorry... only now I discovered my silly mistyping ('pico' had to be 'nano') on my 1st post which confused many members
150ps to 350ps (250ps -/+ 100ps) 150ns to 350ns (250ns -/+ 100ns).

By the way, this topic is somehow solved, thanks to many interesting comments and remarks. I just liked to correct my 1st post.

"Being late is better than... " (I am not sure how to complete it in English ).

Kerim

if you keep saying you're sorry, you'll fit in well with Canadians.