Skew is an unwanted delay during the propagation lines between the clock source and clock destination. Search for "RoboClock" at https://www.cypress.com.
or for "clock syntesizer" at https://www.ti.com
Solving skew problems with PLL based circuits are usually adding phase noise (jitter) to a clean signal generator (-145dBc) destroying the pase noise parameter (down to -90dBc).
Jitter and skew are two corelated problems. Trying to remove one you're creating (more or less) the other.