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PWM only operation in a DCDC at low load current

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buenos

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hi

I have to choose a DCDC converter, and only 2 on the market would be suitable based on the specs and price:

TPS62065 with auto transitioning between PWM and PFM modes ($1.40),
NCP1595A with PWM mode only ($0.38).

The converter has to be operational at load currents from 0 to 1.5A.

My question:
Can I use the PWM-only converter in the required load current range, or it requires a minimum load?
What would happen with this at zero load current? The datasheet does not mention any PFM or pulse skipping...
 

PWM with synchronous rectification can perfectly work at low or zero output current and provides a cleaner output voltage than PFM, pulse skipping or similar techniques. The efficiency at light load as lower, however.
 

the TPS62065 has synchronous rectification and PWM-to-PFM mode autoswitch as well. why does it need the PFM support then?
I did a simulation with virtual relays and an LC filter, the output was oscillating between 0V and V_in at a rate about f_sw/100 when R_load was 1Mohm, and provided stable D*V_in output when R_load was a few ohms. why was that? As I remember from school, approaching zero load current, the duty cycle approaches 0 which is not feasible (minimum on-time and off-time specs of the controllers), so there is the need for PFM mode. Although in all examples at school (few years ago) they had one switch and a diode.
 

why does it need the PFM support then
I already mentioned the reason for providing PFM in my previous post. It's efficiency. Figure 4 in the TPS62065 datasheet shows the difference in a very graphic way.
As I remember from school, approaching zero load current, the duty cycle approaches 0
It's not the case with synchronous buck converters. Here the inductor current is allowed to change it's sign, so no discontinuous mode exists.
 

ok. does the duty cycle depend on the load current in synchronous buck converters? if not, then it doesnt even have to be controlled.
i was trying to find a duty cycle vs load current curve in google, but couldnt find any.
for switch+diode type buck converters, the D(I_Load) curve crosses the 0,0 point with infinite slope, which means D=0.
When you are saying that its not the case with sync.rectifiers, then i would think that the D(I_Load) curve must be flat and not cross the 0,0 point. I would like to see that curve in a tech paper or appnote or book.

in the past, we had problems with DCDC converter minimum load requirements. these requirements are unrealistic when we supply power for example to a processor. While it starts up, it doesnt draw full current immediately, but the supply voltage still has to be stable. i just want to find a way to make shure that i will never have that problem. also, providing a minimum resistive load dissipating a watt would be stupid in a moderd embedded computer design.
 

The duty cycle versus output voltage and load current behaviour of different switcher topologies is important for the control loop analysis and dimensioning. For this reason, you can find many references to it in applications notes, as far as I'm aware of. Possibly not as a digram, but in the design formula derivation.

Anyway, the basic behaviour can be easily understood, I think.
does the duty cycle depend on the load current in synchronous buck converters? if not, then it doesnt even have to be controlled
It doesn't depend on it for an ideal converter (zero inductor and switch resistance, no switching time, perfectly constant timing). Mentioning this points also clarifies, why it has to be controlled for a real one. :smile:

Instead of giving verbose explanations, I suggest to simply set a synchronous switcher to forced PWM mode and watch the duty cycle and preferably also the inductor current with varying load. I think, it get's obvious why no artificial load is required for this switcher type.

A non-synchronous switcher's operation has to be distinguished between continous mode (CM) for high load currents and discontinuous mode. In DCM, the duty cycle is proportional to load current and thus drops to zero with the load current. As a consequence, the loop gain is also varying (at least for a voltage mode controller).
 

thanks.

one more thing, the NCP1595A is a synchronous rectifier, but the datasheet distinguishes between CCM and DCM. im not shure what they mean on DCM, because it seems on the waveform, that the switching stops when the inductor current drops to zero, however they didnt mention anything about this in the text. in generral i know what DCM is, but as you said this sync.rect switcher should provide continous conduction at all times.

thats why i have designed in the TI part (4 pieces/board) today, even if it increases the product cost by $4. the choice has to be a very safe choice, since my board is very complex and very expensive, also the development schedule is tight, the first prototype has to boot OS without major hand-modifications. The NCP datasheet does not have much explanations about the operation of the chip, so i cant be shure what it does or doesn't.
 

I have been referring to basic synchronous operation, as it is e.g. implemented with a TPS40055 (PWM controller) or those controllers, that offer a forced PWM mode. NCP1595A however doesn't implement a pure fixed PWM mode. I also suspected this from the efficiency characeristic, but didn't look into the details before. At first sight, it implements at least some kind of pulse skipping method. I agree, that the datasheet isn't very clear about the functional details. It's a chip, that neither needs nor allows adjustment of the feedback loop.

I also remember some TI chips implementing auxilary functions, that revealed only at second sight.
 
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