Looking to design something resembling a high voltage Class D amplifier to output for a few ms occasionally.
Say the PWM is switching at 500k and the output is 2kHz.
So you have got a bog standard LC LPF where the inductor has one end going up and down at 250k and the other end at 2kHz.
My question is how to design an inductor to avoid saturation. My thoughts were that as far as 2kHz is concerned the full voltage is on the inductor output (say the output is 50Vrms) but on the input there is nothing (at 2kHz, just the 500k switching). So the inductor has to withstand the whole 50Vrms? Right?
So I can just use the EMF equation to design the inductor to avoid saturation?
Typically saturation requirements are set by the low frequent (2 kHz) output current, at least as long as pwm current ripple is small related to load current. PWM voltage mainly matters regarding core losses.
Ok so I guess my mistake is that I am assuming that the inductor needs to hold enough energy (in advance) for the next half cycle which is obviously wrong.
Saturation flux can be expressed as ∫Udt or I limit, both values are directly related by the magnetization characteristic (B/H curve). In an application with DC or low frequency output, its easier to look at current values.
Saturation flux can be expressed as ∫Udt or I limit, both values are directly related by the magnetization characteristic (B/H curve). In an application with DC or low frequency output, its easier to look at current values.
Welcome to the world of designing inductors for power electronics, you need to work out the peak current the choke will ever have to deal with (peak of your 2kHz + sw ripple) and use this to ensure the ampere turns do not exceed a safe level for the inductance you require ( L = N^2 x u x uo x Ae / lg) & Lx Ipk^2 = Bpk^2 x Ae x lg/ (uxuo)