What is the purpose of using breakpoints in a Modelsim simulation ?
Clearly, the simulated hardware runs in parallel (line 100 in our code coexists with line 200...) - so what is the purpose of breaking it in the middle?
Because you might want to debug a chain of variable assignments. Vhdl is not all about synthesisable code. You can write behavioural models in vhdl too.
Remember that vhdl is actually executed like any other language, in sequence. So break points are just as valid.