I don't have a lot of experience with VHDL and I need some help to create a VHDL code for this situation:
Draw a control circuit that generates a pulse signal with:
fixed working frequency (100 KHz)
variable working cycle
The phase difference should be increased or decreased by the direction of the spin of a rotary control of 8 bits.
Additional info: D = t (on) / T
D = working cycle
t (on) = Time the activated signal lasts
T = signal period (constant)
Pulse widths and periods are usually generated in units of system clock period. So the first question is about the available system clock. A 25.6 MHz clock (or a multiply of it) would e.g correspond to an exact 8-Bit 0-100 % pulse width range control.
The board I'm using is the Spartan-3E Starter Kit. In the manual of the board it says that "there are 50,000 clock cycles at 50MHz in the duration of one of these 1ms chatter events".