# Pull-Up Pull-Down - please explain

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#### Free_Will

##### Member level 3
Pull-Up Pull-Down

Can anyone explain the Pull-Up and Pull-Down phenomenon? Especially
if we are using microcontrollers or logic elements.
I mean in which situations can we use them?Can you give an example

#### BigBoss

Re: Pull-Up Pull-Down

Free_Will said:
Can anyone explain the Pull-Up and Pull-Down phenomenon? Especially
if we are using microcontrollers or logic elements.
I mean in which situations can we use them?Can you give an example
In the case of using " open collector " logic circuits , you have to use pull-up or when you need to pull down a input to logic 0 level.
Be careful , pull-up or pull-down resistors can not be selected arbitary .
You have to consider input and output capacitance values of the circuit to be concerned.
Good Luck..

#### bunalmis

##### Full Member level 5
Re: Pull-Up Pull-Down

All unused logic inputs must be tie appropriate logic level.

For this purpose we can use resistors.

Pullup resistor connected from input to vcc.
Pulldown resistor connected from input to gnd.

Forexample if you have and gate but if you want only one inputs.
You must use pullup resistor for unused input.
Your sistem dont work If you use pulldown resistor. Becouse logic 0 level
inhibit the output.

#### j_o_n_i

##### Junior Member level 3
when you have an IC with open collector output its output can switch between two states LOW (it can sink a specified amount of current) and
Hi-Z -> it acts like it wasn't connected at all, that means it has no effect on the output. If you are interested of having a logic HIGH state instead you have to add a pull-up resistor with one terminal connected to the IC output and the other to Vcc.

regards

#### turttle

##### Member level 2
If you have true Tri-state logic (H+L+Z) ie in bus transceivers were both pull-up or pull-down could be used to prevent floating inputs, pull-up is the prefered solution because of noise margin in TTL compatible circuitry is larger in H state than in L (that's one of the reasons for many "active low" inputs ;-) )

Cheers ;-)

#### year

##### Member level 3
You nay know rising and falling speed in high speed logic.

It is another point of this issue....

#### PigiPigi

##### Member level 2
Pull Up is a technique. In this manner ic vendors make an output driver (typically a BJT transistor) with out any load. User select a good load and VCC as he want.

#### PigiPigi

##### Member level 2
Oh! Excuse me!
Pull down is same is pull up, but output transistor is PNP (PMOS).