preethi19
Full Member level 5
Hi i am trying to learn the concept of pull up and pull down transistor. I found this concept online which is described below. When two current sources (Transistors which act as current sources) are connected in series, determination of the output voltage is done. I have attached an image with rough values (just for eg i used random voltages and current resistor values). Pls correct me if my understanding is wrong!!!
In (1) we can see equal currents of 3A flow through both the resistors and we find the Vout value.
In (2) for decreased gate voltage at pmos and increased gate voltage at nmos the current values changes and so does the Vout.
All this is fine. I read here the transistors act as pull up and pull down meaning that they "force an output or input to go to a desired state".
So say i want 6V at nmos gate again which is now increased to 6.4V. How does this happen. Like how does the circuit correct back to the state in (1) from (2). Can anyone plsssss explain this concept with simple math??? If there is a feedback then wer is the feedback connection given and from der on wat happens and how does the calculation go becoz i would like to solve it and see. Would be a great help.. Thank you!!!!
In (1) we can see equal currents of 3A flow through both the resistors and we find the Vout value.
In (2) for decreased gate voltage at pmos and increased gate voltage at nmos the current values changes and so does the Vout.
All this is fine. I read here the transistors act as pull up and pull down meaning that they "force an output or input to go to a desired state".
So say i want 6V at nmos gate again which is now increased to 6.4V. How does this happen. Like how does the circuit correct back to the state in (1) from (2). Can anyone plsssss explain this concept with simple math??? If there is a feedback then wer is the feedback connection given and from der on wat happens and how does the calculation go becoz i would like to solve it and see. Would be a great help.. Thank you!!!!
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