As the NF parameter isn't fixed in the model file, I think it's your choice - as long as you think you won't exceed a certain wmax value, which isn't given as well. Many model files limit their validity/accuracy not only for min/max length (like in this case), but also for the width (or rather drain current).
It's a FinFET or Vertical Gate FET not because of the number of gates, but because the gate is raised, you have two, three, or even four areas of the gate available for inversion to transport charge compared to a single region in planar cmos.