3pitom3
Newbie level 4

I've been using >=22nm PTM models for a few months now, and it's been going pretty well.
Now I wanted to try newer technologies, which are FinFet-based, for example 20nm HP.
Unfortunately I'm getting some behavior that I'm not sure I can explain.
Attached is a simple hspice deck that sets each port of the transistor to 0V.
If I set the 'use_finfets' parameter to 0, it uses 22nm LP technology, and as expected, returns:
There's no voltage being applied anywhere, so nothing happens, and this is true whether I use an nmos or a pmos
(set with the 'use_n' parameter).
Now if I set 'use_finfets' to 1, it uses 20nm HP technology (FinFet), and returns this:
There's current flowing through the voltage sources?? I'm not sure I can explain why.
Also, if I set 'use_n' to 1 (to use a PMOS instead of an NMOS), it returns:
So again, current flows, but this time it flows in the opposite direction??
Thank you for your help!
The archive contains test2.sp, the spice deck, as well as the PTM models found here: http://ptm.asu.edu/latest.html
test2.sp is as follows:
Now I wanted to try newer technologies, which are FinFet-based, for example 20nm HP.
Unfortunately I'm getting some behavior that I'm not sure I can explain.
Attached is a simple hspice deck that sets each port of the transistor to 0V.
If I set the 'use_finfets' parameter to 0, it uses 22nm LP technology, and as expected, returns:
**** voltage sources
subckt
element 0:vdrain 0:vgate 0:vsource
volts 0. 0. 0.
current 0. 0. 0.
power 0. 0. 0.
There's no voltage being applied anywhere, so nothing happens, and this is true whether I use an nmos or a pmos
(set with the 'use_n' parameter).
Now if I set 'use_finfets' to 1, it uses 20nm HP technology (FinFet), and returns this:
**** voltage sources
subckt
element 0:vdrain 0:vgate 0:vsource
volts 0. 0. 0.
current 2.211e-19 -4.422e-19 2.211e-19
power 0. 0. 0.
There's current flowing through the voltage sources?? I'm not sure I can explain why.
Also, if I set 'use_n' to 1 (to use a PMOS instead of an NMOS), it returns:
subckt
element 0:vdrain 0:vgate 0:vsource
volts 0. 0. 0.
current -1.118e-22 2.237e-22 -1.118e-22
power 0. 0. 0.
So again, current flows, but this time it flows in the opposite direction??
Thank you for your help!
The archive contains test2.sp, the spice deck, as well as the PTM models found here: http://ptm.asu.edu/latest.html
test2.sp is as follows:
Code:
* Test FinFet
.param use_finfets=1
.param use_n=1
.param Vol = 0.70
.param simt = 5n
.param fin_height=28n
.param fin_width=15n
.param lg=24n
.if (use_finfets == 1)
.include "20nm_HP.pm"
.param tech = 20e-9
.subckt pfetz drain gate source body wsize=1 lsize=1
mpfet drain gate source body pfet L='lsize*lg' NFIN=wsize
.ends
.subckt nfetz drain gate source body wsize=1 lsize=1
mnfet drain gate source body nfet L='lsize*lg' NFIN=wsize
.ends
.else
.include "22nm_HP.pm"
.param tech = 22e-9
.subckt pfetz drain gate source body wsize=1 lsize=1
M1 drain gate source body pmos L='lsize*tech' W='wsize*tech'
.ends
.subckt nfetz drain gate source body wsize=1 lsize=1
M1 drain gate source body nmos L='lsize*tech' W='wsize*tech'
.ends
.endif
Vgate gate 0 0
Vdrain drain 0 0
Vsource source 0 0
.if (use_n == 0)
X1 source gate drain 0 nfetz
.else
X1 source gate drain 0 pfetz
.endif
.TEMP 85
.OP
.OPTIONS NODE
.tran 'simt/100' simt
.end