PSRR in the LDO --------- need help

[poweric]

I am simulating a LDO the supply voltage is 3.3v
The psrr+ of the ldo is 89db
but the psrr- of it is only 4db

is it the necessary to simulate the PSRR-
and the 4db is too small??

 

[analog_prodigy]

I don't know whether PSRR- is necessary or not, but -4dB isolation is very small as of my knowledge. It should be around -70dB or above

 

[gelo]

Basically, in My experience I try to set the PSRR at around 80dB

 

[castrader]

great c connect to gnd
so psrr to gnd is bad
but 4dB is too small

 

[poweric]

BUT I HAVE THE QUESTION
if the psrr-( vout vs gnd) is large such as (-70db)
when the gnd became larger ,the vout become smaller than the gnd
how can i get the vout as my reference because the vout-gnd is reference voltage

if the if the psrr-( vout vs gnd) is small such as (-4dcb)
when the gnd is float the vout become larger the vout become large as the gnd
but the vout-gnd may keep a constant value as my reference


this is my idea for the question
hope for your replies

 

[pmr9]

I think PSRR- is not necessary and if u do it it shows very less, bcoz only R's in that sig path..
in case of source ,sink ldo which is capable of providing i in both dirs then psrr from + and PSRR- id=s very imp concerns.

 

[poweric]

i know
thans for your helps

 

[engronger]

you LDO can have so good PSRR? my design ouly -50~60dB

Basically, in My experience I try to set the PSRR at around 80dB