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provide the necessary circuit

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ASIC_int

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Can u provide a circuit that can test whether a given binary no. is power of 2?
 

Hi ASIC_int,

One-hot detection circuit is the one which you are looking for "to determine whether binary number is power of 2".

If your input is n-bit wide, bit-wise sum of the input vector is "1", then it is a power of 2.

Example :

module one_hot (in,out);

input [3:0] in;
output out;

wire [2:0] sum;

assign sum = in[0] + in[1] + in[2] + in[3];

assign out = (sum == 1) ? 1'b1 : 1'b0;

endmodule

Regards,
dcreddy
 
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    FvM

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dcreaddy1980


What do you mean by bitwise sum? Do u want top mean the LSB of the' resut of summatio'n? The reason I ask this because the binary sum will have sum and carry and the sum can be a binary value whose decimal equivalence is more than 1.

How do u say it is one-hot detection circuit?
 

I think the meaning of "bitwise sum" is obvious from the code. The only point, that may need explanation is the used bitwidth in calculating
assign sum = in[0] + in[1] ...
It can be derived from Verilog Rules for expression bit lengths. This is a case of context-determined expression, where the maximum bitlength of left hand and right hand side of the expression is used. Thus all possible carries are considered correctly.
 

if a number is power of 2, only one bit will be equal to one, other one bit to zero. quite easy check, as describe by dcreddy1980, with the sum all individual bit.
 

rca

Even a binary number having odd no. of 1s will produce the sum to be one, but still it is not power of 2. Is not it?

fvm

But how will you store the carry and full sum? Even a binary number having odd no. of 1s will produce the sum to be one, but still it is not power of 2. Is not it?
 

You didn't pay attention to the definition [2:0] sum. The sum for odd numbers can be also 3 in the present example. For the detail behaviour of the add operation, see my previous post.
 

sorry, you could count the number of 1 in the vecotr and this one will equal to 1 for power of 2 number, isn't it?
 

Hi ASIC_int,

Synthesize the above particular piece of code and apply "0000_0111" vector to the input of the circuit(netlist) and see what it will result.

Your expectation is "1" for the abve vector, I would say no, try it out and comeback if your expected result has been generated by the circuit.

Regards,
dcreddy
 

fvm

Sorry, I did not see the [2:0]. Thanks for the tips. Now I agree with the solution of dcreaddy1980.

Regards
 

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