Proteus and MAX232.Please help

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syide

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I have a problem with the simulation of max 232 in proteus.This the code for simulation.

#include <16F877a.h>

#define RS232_XMIT PIN_A1
#define RS232_RCV PIN_A0 // PIC line which receives PC transmission

#use delay(clock=4000000) // 4 MHz OSC
#use rs232(baud=9600, xmit=RS232_XMIT, rcv=RS232_RCV)

void main() {

int i;

while(1) {
i = 65; // Recall ASCII 'A' is 65
do {
putc(i);
delay_ms(1000); // send characters every 1 sec
i++;
} while (i<=122); // Recall ASCII 'z' is 122
}
} // end of main


But using when i try to simulate with proteus it did not gave proper result.Why?
 

The RX and TX pins on the VTERM default to active high. Thus the idling state is high, the start bit is low and the stop bit high. Data bits appear as logic high for '1' and logic low for '0'. This is directly compatible with the on board UARTs present in many microcontrollers, and also with external UARTs such as the 6850 and 8250. However, if you are connected to the output side of a MAX232 (which contains logic inverters) you will need to set the RX/TX polarity to be inverted. This is a property of the Edit Component dialogue form on the terminal.

Iain.
 

    syide

    Points: 2
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Thnks it work now
 



Hi i think you have to add the four capacitors for level shifting
 

u didnt use capacitors with max232
arent they mandatory?
plz do reply?
 

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