Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

propagation delay in logic gates

Status
Not open for further replies.

shiva20587

Newbie level 3
Joined
Aug 5, 2011
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,307
Hi,,I have a query regarding the propagation delay in a gate,propagation delay is generally measured between 50 percent points on the input and output waveforms, why cannot we measure it between 20% or 80% points on the waveforms ? Is there any specific reason for opting 50% points ??

Regards,
Shiva.
 

Hi,,I have a query regarding the propagation delay in a gate,propagation delay is generally measured between 50 percent points on the input and output waveforms, why cannot we measure it between 20% or 80% points on the waveforms ? Is there any specific reason for opting 50% points ??

Regards,
Shiva.

Because if you used multiple % points, you would be measuring two things combined: propogation delay and edge rate. If you want to know how long it takes a digital something to propogate through a device, you need to measure from the logic threshold point.

Kevin Jennings
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top