actually i want to know the spi protocol,normaly project on sending data throw mcu 8051.affter sending how will it work at other mcu..tell me?plz give a reference code for refer and gain knowledge to doing this project..........
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 ;****************************************************************************************************** ;***************************************************************************************************** SPCR DATA 0d5h ; SPI control register SPSR DATA 0aah ; SPI status register SPIF EQU 10000000b ; interrupt flag SPDR DATA 86h ; SPI data register DATAa equ 0a0h ADDRESS EQU 40 ;*********************************************************************************************** ;*********************************************************************************************** ; Microcontroller connections to dac CS_ BIT p3.0 ; MOSI BIT p3.1 ; SPI MISO BIT p1.2 ; SPI SCK BIT p3.3 ; SPI ; AT25040 device command and bit definitions. RDSR EQU 05h ; Read Status Register WRSR EQU 01h ; Write Status Register READ EQU 03h ; Read Data from Memory WRITE EQU 02h ; Write Data to Memory WREN EQU 06h ; Write Enable WRDI EQU 04h ; Write Disable A8 BIT acc.3 ; MSB of address NRDY BIT acc.0 ; high = write cycle in progress ;************************************************************************************ ;************************************************************************************* main: ; SPI master mode initialization code. setb CS_ ; setb MOSI ; initialize SPI pins setb MISO ; setb SCK ; mov SPCR, #01010101b ; initialize SPI master ;****************************************************************************************** ;***************************************************************************************** ; interrupt disable, pin enable, ; MSB first, polarity 0, phase 1, ; clock rate /16 ; Write one byte to dac and verify (read and compare). ; Code to handle verification failure is not shown. ; Needs timeout to prevent write error from causing an infinite loop. call enable_write ; must precede each byte write mov a, #DATAa ; data mov dptr, #ADDRESS ; address call write_byte ; write wchk: call read_status ; check write status jb NRDY, wchk ; loop until done mov dptr, #ADDRESS ; address call read_byte ; read cjne a, #DATAa, ERROR ; jump if data compare fails error: sjmp main read_status: ; Read device status. ; Returns status byte in A. clr CS_ ; select device mov a, #RDSR ; get command call masterIO ; send command call masterIO ; get statussetb CS_ ; deselect device ret enable_write: ; Enable write. ; Does not check for device ready before sending command. ; Returns nothing. Destroys A. clr CS_ ; select device mov a, #WREN ; get command call masterIO ; send command setb CS_ ; deselect device ret read_byte: ; Read one byte of data from specified address. ; Does not check for device ready before sending command. ; Called with address in DPTR. ; Returns data in A. clr CS_ ; select device mov a, dph ; get high byte of address rrc a ; move LSB into carry bit mov a, #READ ; get command mov A8, c ; combine command and high bit of addr call masterIO ; send command and high bit of address mov a, dpl ; get low byte of address call masterIO ; send low byte of address call masterIO ; get data setb CS_ ; deselect device ret ;************************************************************************************************** ;************************************************************************************************** write_byte: ; Write one byte of data to specified address. ; Does not check for device ready or write enabled before sending ; command. Does not wait for write cycle to complete before returning. ; Called with address in DPTR, data in A. ; Returns nothing. clr CS_ ; select device push acc ; save data mov a, dph ; get high byte of address rrc a ; move LSB into carry bit mov a, #WRITE ; get command mov A8, c ; combine command and high bit of address call masterIO ; send command and high bit of address mov a, dpl ; get low byte of address call masterIO ; send low byte of address pop acc ; restore data call masterIO ; send data setb CS_ ; deselect device ret ;************************************************************************************************** ;************************************************************************************************ masterIO: ; Send/receive data through the SPI port. ; A byte is shifted in as a byte is shifted out, ; receiving and sending simultaneously. ; Waits for shift out/in complete before returning. ; Expects slave already selected. ; Called with data to send in A. Returns data received in A. mov SPDR, a ; write output data bbb: mov a, SPSR ; get status anl a, #SPIF ; check for done jz bbb ; loop until done mov a, SPDR ; read input data ret end
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