Process corners simulation...

[vidhyauma]

Hi all,

What are the parameters taken into account in the different process corners and its values? What is going on internally in the software? Is it only the Vth and the oxide thickness that varies or is there anything else? Please help me out.........

 

[analogLow]

Hi all,

What are the parameters taken into account in the different process corners and its values? What is going on internally in the software? Is it only the Vth and the oxide thickness that varies or is there anything else? Please help me out.........

I design currently in 65nm CMOS. I typically run TT, FF, SS, FS, and SF corners. The letters represent the drive strength of the NMOS and PMOS transistors. For example, a "FS" corner means Fast NMOS and Slow PMOS. At each corner, data is loaded from the manufacturer that describes different global variations(i.e. all devices affected the same) for the transistor. There are many different process variables that change ... it depends on the manufacturer of course. You need to look at the corner files to see what changes and gives the biggest impact on the transistors.

Of course if you are designing in a newer digital process it is essential that you run Monte-Carlo simulations at each process corner. This ensures that you take into account all local variations (i.e. each transistor has a different drive strength mostly to the distribution of Vt).

Cheers
analogLow

 

[SwordFish]

you should loot at the model file of your technology.
there it will be a section where all the corners are defined. You will notice that there are few parameters that change for each corner. (usually between 3 and 20).
All the other model parameters are kept the same for all corners.

So if you look in the "corners section" you will notice what are the variations introduced for each corner. End exactly which parameter is varied.

the simulation software is actually simulating with a slightly different model for each corner (TT,SS,FF,SF,FS).

 

[palmeiras]

HI vidhyauma,

There are many parameters that are changes in the corner models.
Carrier mobility (uo) is one of them. Capacitances are changed too.
I have opened my 90 nm CMOS process models, and I found more than 10 parameters that are changed.
Regards,

 

[dhaval4987]

I design currently in 65nm CMOS. I typically run TT, FF, SS, FS, and SF corners. The letters represent the drive strength of the NMOS and PMOS transistors. For example, a "FS" corner means Fast NMOS and Slow PMOS. At each corner, data is loaded from the manufacturer that describes different global variations(i.e. all devices affected the same) for the transistor. There are many different process variables that change ... it depends on the manufacturer of course. You need to look at the corner files to see what changes and gives the biggest impact on the transistors.

Of course if you are designing in a newer digital process it is essential that you run Monte-Carlo simulations at each process corner. This ensures that you take into account all local variations (i.e. each transistor has a different drive strength mostly to the distribution of Vt).

Cheers
analogLow

AnalogLow,

I am trying to perform local variations but I dont know how to do so. Where do I get the variations described? Do I just have to add scripts in my hspice netlist or I need to modify model files. how do I need any additional library other than my spice netlist and the model file? I am confused how to perform monte carlo analysis.

 

[analogLow]

AnalogLow,

I am trying to perform local variations but I dont know how to do so. Where do I get the variations described? Do I just have to add scripts in my hspice netlist or I need to modify model files. how do I need any additional library other than my spice netlist and the model file? I am confused how to perform monte carlo analysis.

dhaval-

The foundry provides device model parameters and also statistics about these parameters (e.g. distribution of the threshold voltage). Lets say you do 10 runs in a Monte-Carlo simulation (.MC 10). Each run uses different model value from the nominal based on the provided distribution. For example, at run 1, the Monte-Carlo simulation chooses VT=0.5, and at run 2 VT=0.3. A random number generator (built into the .MC command) determines the new value of VT.

So when I run a Monte-Carlo analysis (with an Eldo netlist), I just add the .MC statement into my .cir file and simulate as usual (i.e. in the command line: eldo XXfilename.cir). This statement takes care of induces local variations (e.g. in VT). You dont need to modify any model files.

I found this presentation to clarify for me what is going on when running a monte-carlo simulation (see slide 29):
https://www.cmoset.com/uploads/Kuzmicz_CMOSET07_slides.pdf

Hope this helps ...

analogLow