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Problems with reading milkyway library with Physical Compiler

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diemilio

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I having a problems trying to read milkyway libraries with physical compiler.

So far I have used Design Compiler to synthesize my design, and JupiterXT to floorplan it following these steps:

Using Design Compiler:

1. Set .db and .sdb libraries (logical and simbolic libraries).
2. Read Verilog file containing functional behavior of the circuit (using the analyze and elaborate commands).
3. Set circuit environment and circuit constraints.
4. Compile
5. write .db, .ddc, .v synthesized files.
6. Check for constraint violations (NO VIOLATIONS FOUND).


Using JupiterXT:

7. Create Milkyway Database using:
a. verilog file of the synthesized design.
b. a Milkyway reference library.
c. and a technology file (.tf) consistent with the reference library.
8. Set timing constraints (SDC file)
9. Set core dimensions.
10. Run "Auto place" to place hierarchy blocks and generate Top floorplan.
11. Save Cells

Using Physical Compiler:

12. Set Milkyway reference library (same reference library used in step 7.b) using set mw_reference_library
13. Set Milkyway design (My design is the Milkyway database generated by JupiterXT) using set mw_design_library
14. Read Milkyway design.

When I try reading the milkyway design (step 14) I get the following Error messages:

Info: CellInst 'sub_35' (alu_DW01_dec_0) is not part of hierarchy or did not link and will be treated as physical only. (MWDC-023)
Info: CellInst 'add_34' (alu_DW01_add_0) is not part of hierarchy or did not link and will be treated as physical only. (MWDC-023)
Info: CellInst 'r50' (alu_DW01_cmp6_0) is not part of hierarchy or did not link and will be treated as physical only. (MWDC-023)
Error: Either 1) link error or 2) corrupted Milkyway database: (MWDC-024)
The signal net 'N64' connects to pin 'SUM[1]'
on cellInst 'add_34' with physical masterCell 'alu_DW01_add_0.CEL',
but the cellInst either did not link or is inaccessible in the Milkyway database.
1) If there are earlier MWDC-023 messages stating that the masterCell did not link,
then the logical library must be updated to have the logical cell description.
2) If there are no link warnings, then the Milkyway database may be corrupted and should be rebuilt.
Error: Either 1) link error or 2) corrupted Milkyway database: (MWDC-024)
The signal net 'N66' connects to pin 'SUM[3]'
on cellInst 'add_34' with physical masterCell 'alu_DW01_add_0.CEL',
but the cellInst either did not link or is inaccessible in the Milkyway database.
1) If there are earlier MWDC-023 messages stating that the masterCell did not link,
then the logical library must be updated to have the logical cell description.
2) If there are no link warnings, then the Milkyway database may be corrupted and should be rebuilt.
Error: Either 1) link error or 2) corrupted Milkyway database: (MWDC-024)
The signal net 'N67' connects to pin 'SUM[4]'
on cellInst 'add_34' with physical masterCell 'alu_DW01_add_0.CEL',
but the cellInst either did not link or is inaccessible in the Milkyway database.
1) If there are earlier MWDC-023 messages stating that the masterCell did not link,
then the logical library must be updated to have the logical cell description.
2) If there are no link warnings, then the Milkyway database may be corrupted and should be rebuilt.
.....
.....
.....


I know the problem is somehow related to a link library but I don't know why. I'm setting the link_library variable like this:

set link_library [ list tsmc015vhdtc.db alu.db ]

tsmc015vhdtc.db is the logical tech library, and alu.db is a file created after the logical synthesis process.

I would really appreciate if someone could tell me what am I doing wrong or what else should I do so that I can continue working.

Thanks for your help,

diemilio
 

Physical Compiler

well. there're simple ways.
you can dump .pdef file, rather than milkyway library, to save the cell floorplan/placement info, as long as you don't perform any logic optimize during floorplan stage.

then, use DC's netlist and sdc, and JupiterXT's pdef file to go down the pc flow.
 

    diemilio

    Points: 2
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Re: Physical Compiler

jackson_peng said:
well. there're simple ways.
you can dump .pdef file, rather than milkyway library, to save the cell floorplan/placement info, as long as you don't perform any logic optimize during floorplan stage.

then, use DC's netlist and sdc, and JupiterXT's pdef file to go down the pc flow.

Thanks for your help. I'll try that.

diemilio
 

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