problems with op amp design

[princerock]

I am doing a op amp design as my first analog project and encountered many problems

1. I made a diff pair plus cascode as my first stage. It has a gain about 50dB according to simulation. However, the bandwidth is very small. The gain drops to 0dB when the frequency is 1MHz. Then how to increase the bandwidth?

2. When I plus a second stage to this circuit, the gain drops dramatically even if it is a simple CS in the second stage. I just connect the output of the diff pair to the gate of the transistor in the second stage directly. Is this right?

3. As it shows in the schematic, I am using a ideal current source. How can I replace it with some transistors?

4. Please point out other problems exists in my schematic.

Please give me some suggestions. Or in which book can I find the solutions to these problems? Thank you very much!

 

[nandu_r]

1) your differential signal is out of comman mode range, as you connected the both other teminal to ground.
so tail current source no longer tail current source(get in to linear region)
2) in case i am wrong , you can achive good bandwidth by cascading low gain amplifier
you can achive this by increasing the tail current source, so Ro decreases and gian goes down

In case you want to develop the current reference, based on the application where you are using this amplifier you can chose complexity.
Best but complicated reference is bandgap current reference
one more technique is ptat reference

you can also generate this by a resistor (simplest)

 

[princerock]

Thank you for your quick reply, nandu_r! However, what do you mean by saying "as you connected the both other teminal to ground"? Could you please explain more?

I don't want to decrease gain to get bandwidth because the specifictions of the project is Av=100dB and GBW=80MHz.

 

[electronrancher]

gate of m1 must have a voltage larger than Vth(M1)+Vsat(M2). You could connect it to the drain of M5 (output terminal) to make a follower.


Actually, that's the best way to test the amp - in closed loop operation. Give a dc voltage to the gate of M0 (say 1.25v) and put the AC source between the gate of M1 and the drain of M5 (output).

Now the dc bias should show 1.25v on the output, and the AC gain can be plotted as the voltage across the ac source.

Ac gain in that configuration should be V(AC:1)/V(AC:2).

PS - are you sure that 1v is the right cascode bias voltage?

 

[princerock]

Thank you very much, electronrancher! I will try your method. Actually, that's my next quesiton: how to determine the bias of cascode? using dc sweep?

 

[electronrancher]

Most of the time it's best to let circuits set their own bias point - for this cascode, you can bias it using a stack of two diode-connected nmos connected to the drain of M5- the tail source. these guys can be much smaller than your diff pair, their vgs sets how high (above the tail) the cascode is held.

now as the voltage on the op amp input goes up and down, the cascode rises up and down to keep the drains of the input pair one vgs above the sources at all times.

since this two-diode stack needs a little bias current you must increase the tail current source to accept this current as well. for example if your tail source is now 100uA you can run 20uA in the cascode bias so increase the tail source to 120uA.

 

[philipwang]

Dear princerock,

Maybe you should study the design flow of a amplifier, you can refer to these two references:
1. Philip E. Allen, CMOS Analog Circuit Design. Chapter 6&7.
2. UC. Berkey course: EE240 (course about amplifier design)
You can download these cource lecture.
Enjoy it!

BG