HaoLi
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Problems on Current Bias.
Hey guys, I confront problem during measurement on the following issue. Highly welcome to kindly leave any suggestions, analysis, even guess!
1) Description of the circuit: M1 is part of functional circuit; Pad Vbias and resister R are used to bias M1. M2 is added to generate a current mirror with M1, used as an indicator that DC current of M1 could be controlled accurately.
2) Simulation: M1/M2=10; Vbias=0.55V, Ibias=300uA; Iused=3mA
3)In measurement, there are two problems that I confront, described in 4) and 5)
4) Problem 1: "DC Source 1 (V1)" has to be set as high as 0.75V (expected Vbias=0.55V as mentioned above), to make sure Ibias and Iused reach expected 300uA and 3mA.
Does this indicate that when V1=0.75V, V2 reach simulation value 0.55V? the voltage loss from DC source to the gate of M1 is as high as 0.2V?
5)Problem 2: For every chip, it works fine at first. Then during the measurement, the circuit collapses somehow. Ibias will be as high as several mA, and Iused becomes 0. It seems that M2 breaks down, and V2 drops. However, with multimeter I found Vbias and GROUND are not shorted. So anyone have some clues on what is going on?
6) The technology I am using is IBM 130um. Max gate voltage of M1 and M2 are both as high as 1.6V.
Hey guys, I confront problem during measurement on the following issue. Highly welcome to kindly leave any suggestions, analysis, even guess!
1) Description of the circuit: M1 is part of functional circuit; Pad Vbias and resister R are used to bias M1. M2 is added to generate a current mirror with M1, used as an indicator that DC current of M1 could be controlled accurately.
2) Simulation: M1/M2=10; Vbias=0.55V, Ibias=300uA; Iused=3mA
3)In measurement, there are two problems that I confront, described in 4) and 5)
4) Problem 1: "DC Source 1 (V1)" has to be set as high as 0.75V (expected Vbias=0.55V as mentioned above), to make sure Ibias and Iused reach expected 300uA and 3mA.
Does this indicate that when V1=0.75V, V2 reach simulation value 0.55V? the voltage loss from DC source to the gate of M1 is as high as 0.2V?
5)Problem 2: For every chip, it works fine at first. Then during the measurement, the circuit collapses somehow. Ibias will be as high as several mA, and Iused becomes 0. It seems that M2 breaks down, and V2 drops. However, with multimeter I found Vbias and GROUND are not shorted. So anyone have some clues on what is going on?
6) The technology I am using is IBM 130um. Max gate voltage of M1 and M2 are both as high as 1.6V.
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