static void RxCallBack(XAxiDma *AxiDmaPtr)
{
int BdCount;
XAxiDma_Bd *BdPtr;
XAxiDma_Bd *BdCurPtr;
u32 BdSts;
int Index;
int RingIndex;
XAxiDma_BdRing *RxRingPtr;
u8 *RxPacket;
for (RingIndex = 0;
RingIndex < AxiDmaPtr->RxNumChannels; RingIndex++)
{
RxRingPtr = XAxiDma_GetRxIndexRing(AxiDmaPtr, RingIndex);
BdCount = XAxiDma_BdRingFromHw(RxRingPtr, XAXIDMA_ALL_BDS, &BdPtr);
BdCurPtr = BdPtr;
for (Index = 0; Index < BdCount; Index++) {
/*
* Check the flags set by the hardware for status
* If error happens, processing stops, because the DMA engine
* is halted after this BD.
*/
BdSts = XAxiDma_BdGetSts(BdCurPtr);
if ((BdSts & XAXIDMA_BD_STS_ALL_ERR_MASK) ||
(!(BdSts & XAXIDMA_BD_STS_COMPLETE_MASK))) {
Error = 1;
break;
}
//Consume RxPacket Here
int PackLength=0;
RxPacket = (u8 *) XAxiDma_BdGetBufAddr(BdCurPtr) ;
/* Invalidate the DestBuffer before receiving the data, in case the
* Data Cache is enabled
*/
Xil_DCacheInvalidateRange((u32)RxPacket, MAX_PKT_LEN);
PackLength=XAxiDma_BdGetActualLength(BdCurPtr,MAX_PKT_Mask);
//look here --@@--, PackLength is zero always
//PackLength=512;
/* Find the next processed BD */
BdCurPtr = XAxiDma_BdRingNext(RxRingPtr, BdCurPtr);
RxDone[RingIndex] += 1;
}
if(BdCount!=0)
{
//@@// added for test to free RX BDs
/* Free all processed BDs for future transmission */
int Status = XAxiDma_BdRingFree(RxRingPtr, BdCount, BdPtr);
if (Status != XST_SUCCESS) {
Error = 1;
}
/* Return processed BDs to RX channel so we are ready to receive new
* packets:
* - Allocate all free RX BDs
* - Pass the BDs to RX channel
*/
int FreeBdCount = XAxiDma_BdRingGetFreeCnt(RxRingPtr);
Status = XAxiDma_BdRingAlloc(RxRingPtr, FreeBdCount, &BdPtr);
if (Status != XST_SUCCESS) {
xil_printf("bd alloc failed\r\n");
return XST_FAILURE;
}
Status = XAxiDma_BdRingToHw(RxRingPtr, FreeBdCount, BdPtr);
if (Status != XST_SUCCESS) {
xil_printf("Submit %d rx BDs failed %d\r\n", FreeBdCount, Status);
return XST_FAILURE;
}
}
}
}