Problem with real numbers

Status
Not open for further replies.

urslen

Member level 2
Joined
Aug 10, 2004
Messages
45
Helped
7
Reputation
14
Reaction score
3
Trophy points
1,288
Activity points
493
Real number is non-synthesizable. But in evaluation of an expression i have to handle some real values. My target device is 2S300Epq208 (Spartan IIE).

Can anybody suggest what to do?
 

The work with real number in FPGA is very complicated.
I suggest to transform the real numbers in integers (taking in consideration all the possible values min and max that the numbers can have). Calculate 24 or 32 bits length (integer). All the calculation is better (easier) done in integers. Of course, you will have an error (truncating error), but the error is known and accepted.
 

You can work in the RTL code with std_logic_vectors. In the testbench you can convert the real numbers in std_logic and vice versa to give data and take expected results.
In the following link, there is a part of code that does these conversions:
**broken link removed**
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…