The work with real number in FPGA is very complicated.
I suggest to transform the real numbers in integers (taking in consideration all the possible values min and max that the numbers can have). Calculate 24 or 32 bits length (integer). All the calculation is better (easier) done in integers. Of course, you will have an error (truncating error), but the error is known and accepted.
You can work in the RTL code with std_logic_vectors. In the testbench you can convert the real numbers in std_logic and vice versa to give data and take expected results.
In the following link, there is a part of code that does these conversions: **broken link removed**