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problem with programming VIC in LPC2378 controller.

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mohanag

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keil t0_irqhandler lpc2378

Hi,

I have written a c code for LPC2378 microcontroller, inorder to set a timer and generate an interrupt whenever the timer overflow occurs and the interrupt is mapped to VIC timer0 vector address 4. The problem is while watching the timer and vector register values.............the overflow is happening finely, the interrupt is generated and notified to the VIC by changing the VIC vector address where the PC has to take control but the pc is not changed to that location to execute the subroutine. Please help me.

Please find my attached code.

#include <stdio.h>
#include <LPC23xx.H> /* LPC23xx definitions */
__irq void T0_IRQHandler (void);
int main (void)
{
/* Enable and setup timer interrupt, start timer */
T0MR0 = 10;
T0MCR = 3; /* Interrupt and Reset on MR0 */
T0TCR = 1; /* Timer0 Enable */
T0PR = 10; /* Timer0 Enable */
VICVectAddr4 = (unsigned long)T0_IRQHandler;/* Set Interrupt Vector */
VICVectCntl4 = 15; /* use it for Timer0 Interrupt priority is 5*/
VICIntEnable = (1 << 4); /* Enable Timer0 Interrupt */
}

/* Import function for turning LEDs on or off */
/* Timer0 IRQ: Executed periodically */

__irq void T0_IRQHandler (void)
{
static int clk_cntr;
clk_cntr++;
if (clk_cntr >= 1000)
{
clk_cntr = 0; /* Activate flag every 1 second */
}
T0IR = 1; /* Clear interrupt flag */
VICVectAddr = 0; /* Acknowledge Interrupt */
}
Thanks in advance.
:cry::cry:
 

dabt_addr +lpc2378

Hello,

You have no loop in main() and are exiting before the interrupt occurs. Try adding:

while(1){};

as the last line in main immediately after VICIntEnable = (1 << 4);.

Hope this helps.

J
 

purpose of using interrupts in lpc2378

Hi,

:cry::cry::cry:
I have included while(1){} at the end of my code but still it didn't jumped to the ISR.

Thanks in advance
 

lpc2378 programing

hi

I am also currently working on the same micro.

I cant see interrupt handler in your code.

When the timer generates and interrupt your micro needs to store all the current registers and PC into interrupt stack and then service the ISR. At the end of the ISR you need to retrive all these registers stored and PC.

Else you micro wont know where to go after the ISR.

Code:
/******************************************************************************
 *
 * MACRO Name: ISR_ENTRY()
 *
 * Description:
 *    This MACRO is used upon entry to an ISR.  The current version of
 *    the gcc compiler for ARM does not produce correct code for
 *    interrupt routines to operate properly with THUMB code.  The MACRO
 *    performs the following steps:
 *
 *    1 - Adjust address at which execution should resume after servicing
 *        ISR to compensate for IRQ entry
 *    2 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.
 *    3 - Get the status of the interrupted program is in SPSR.
 *    4 - Push it onto the IRQ stack as well.
 *
 *****************************************************************************/
#define ISR_ENTRY() asm volatile(" sub   lr, lr,#4\n" \
                                 " stmfd sp!,{r0-r12,lr}\n" \
                                 " mrs   r1, spsr\n" \
                                 " stmfd sp!,{r1}")

/******************************************************************************
 *
 * MACRO Name: ISR_EXIT()
 *
 * Description:
 *    This MACRO is used to exit an ISR.  The current version of the gcc
 *    compiler for ARM does not produce correct code for interrupt
 *    routines to operate properly with THUMB code.  The MACRO performs
 *    the following steps:
 *
 *    1 - Recover SPSR value from stack       
 *    2 - and restore  its value                   
 *    3 - Pop the return address & the saved general registers from
 *        the IRQ stack & return
 *
 *****************************************************************************/
#define ISR_EXIT()  asm volatile(" ldmfd sp!,{r1}\n" \
                                 " msr   spsr_c,r1\n" \
                                 " ldmfd sp!,{r0-r12,pc}^")

/******************************************************************************

this is an example of interrupt handler which i got with my board.
 

compiler lpc2378 discount price

Hi,

I have incorporated this piece of code in my program but still it didn't worked for me.
#include <stdio.h>
#include <LPC23xx.H>
#define ISR_ENTRY() asm volatile(" sub lr, lr,#4\n" \
" stmfd sp!,{r0-r12,lr}\n" \
" mrs r1, spsr\n" \
" stmfd sp!,{r1}")
#define ISR_EXIT() asm volatile(" ldmfd sp!,{r1}\n" \
" msr spsr_c,r1\n" \
" ldmfd sp!,{r0-r12,pc}^")

__irq void T0_IRQHandler (void);
int main (void)
{
VICVectAddr4 = (unsigned long)T0_IRQHandler;
VICVectCntl4 = 5;
VICIntEnable = (1 << 4);
T0MR0 = 10;
T0MCR = 3;
T0TCR = 1;
T0PR = 10000000;
while(1)
{
}
}
__irq void T0_IRQHandler (void)
{
static int clk_cntr;
clk_cntr++;
if (clk_cntr >= 1000)
{
clk_cntr = 0;
}
T0IR = 1;
VICVectAddr = 0;
VICIntEnClr = 1;
return;
}

Could you please tell me where I need to put this macro and how this macro will be called whenever an interrupt occurs. Please note I haven't burnt any code in the board, I was just simulating the code in the keil uVision IDE. The below mentioned code is the vector table which is there in my startup code. Please tell me is there anything that i need to change in my startup code.

Vectors LDR PC, Reset_Addr
LDR PC, Undef_Addr
LDR PC, SWI_Addr
LDR PC, PAbt_Addr
LDR PC, DAbt_Addr
NOP ; Reserved Vector
LDR PC, [PC, #-0x0120] ; Vector from VicVectAddr
LDR PC, FIQ_Addr

Reset_Addr DCD Reset_Handler
Undef_Addr DCD Undef_Handler
SWI_Addr DCD SWI_Handler
PAbt_Addr DCD PAbt_Handler
DAbt_Addr DCD DAbt_Handler
DCD 0 ; Reserved Address
IRQ_Addr DCD IRQ_Handler
FIQ_Addr DCD FIQ_Handler

Undef_Handler B Undef_Handler
SWI_Handler B SWI_Handler
PAbt_Handler B PAbt_Handler
DAbt_Handler B DAbt_Handler
IRQ_Handler B IRQ_Handler
FIQ_Handler B FIQ_Handler

Thanks.
 

lpc2378 vic

I dont know much about keil uVision IDE

I am using GNU tool chain.

are u using a development board or custom made board.

these macros are actually called inside your ISR

void timer_isr(void)
{
ISR_ENTRY();
...
...
your isr code ...
...
...
ISR_EXIT();
}


if you are using ide your ide might be having similar sort of macro or similar arrangement. these macros store the current state of register and PC and then load PC with the ISR add which is in VIC and vice versa..

have a look at following link

**broken link removed**
 

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