Problem with pic frequency counter

[neazoi]

Hi, I have made the "Variant 2" of this frequency counter https://www.qsl.net/dl4yhf/freq_counter/freq_counter.html
Because I had a 4 digits display and I wanted the 100's Hz to be displayed, I ignored the D1 connection, and I connected D2 to first digit, D3 to second digit, D4 to third digit and D5 to fourth digit.

The problem is, that the last digit is not completely blanked (the segments that should not lit).
So I see some segments that are a bit bright (actual reading) and some others that are dim, which should be off.
This happens only in the last digit, the one that is connected to the transistor.

Can you help me with this problem?

 

[Okada]

Zip and post the complete project files. Also include Proteus circuit if you have. Which pin does it use to read frequency ? External Interrupt pin ? You want to measure max 9999 Hz ?

 

[neazoi]

Zip and post the complete project files. Also include Proteus circuit if you have. Which pin does it use to read frequency ? External Interrupt pin ? You want to measure max 9999 Hz ?

The firmware is here https://www.qsl.net/dl4yhf/freq_counter/freq_counter.zip look at the 2 version.
The circuit is this one https://www.qsl.net/dl4yhf/freq_counter/picboard5_sch.gif
The max frequency I will use it is 30MHz.
the frequency input pin is RA4.

I have tested it and it works, it is just this last digit (100's Hz) that presents this problem I mentioned earlier.

 

[betwixt]

By 'last digit' I assume you mean the one connected to D5 on the schematic.

The PIC has run out of pins to drive 5 digits so the way it works is to drive one of four or none at all, the none at all condition being detected by T1 which forms a crude NAND gate. I suspect the problem lies in the slow respose of the gate circuit, try replacing R10 with a signal diode in the same way as D1, D2 and D3 the connecting a 2.2K resistor between the base of T1 and VSUPP.

Brian.

 

[neazoi]

By 'last digit' I assume you mean the one connected to D5 on the schematic.

The PIC has run out of pins to drive 5 digits so the way it works is to drive one of four or none at all, the none at all condition being detected by T1 which forms a crude NAND gate. I suspect the problem lies in the slow respose of the gate circuit, try replacing R10 with a signal diode in the same way as D1, D2 and D3 the connecting a 2.2K resistor between the base of T1 and VSUPP.

Brian.

I did so. But it did not help.
Changing the 2.2k resistor to something like 1meg, allowed a bit easier identification of the number value in the digit (just visually better, no problem correction).
Just to see what will happen, I swapped the cathodes of the last two display digits and now the problematic cathode is the swapped one. So it is not a display problem.

Any other ideas you can come up with, to correct the problem?

 

[betwixt]

The only other solution is to use a real NAND gate and a blanking circuit to get the speed boost you need. The real problem is that a normal multiplexed display has an "all digit drives off" period between one digit and the next to allow the charges on the drive lines to decay but when you generate the digit select signal from the absence of other digit drives, it is instantaneous with no guard period.

You might be able to add a software delay when D1+D2+D3+D4 = 0 where all the segmnents are turned off for a few uS before turning them on again. How good are you at PIC assembly language? It looks like it is written for an older version of MPLAB but it should assemble if imported into the current MPLABX suite.

Brian.