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Problem with output stage of a class D amplifier

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diemilio

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Hi everyone. I'm trying to design a high efficiency output stage for an audio amplifier. I want to keep my design simple so I found this class D amp (attached circuit) on the web but it seems to me that I'm missing something here cause if you notice the LC filter is used to get the original audio wave (in this case the sine wave) from a PW modulated signal, so at resonace the capacitor will act as very low impedance making a high current (very high) flow through it making my efficency 0!!!.

How can I modify my circuit to get the supposed 90% efficiency of a class D amp???

Thanks for your help,

diemilio
 

Re: Output stage

Gate source capacity of MOS large therefore you need good mos driver.
 

Re: Output stage

bunalmis said:
Gate source capacity of MOS large therefore you need good mos driver.

Could you please give me MOS references??
 

Output stage

C3 is too big, i think you should take it 100nF-1000nF.
Now you get LPF at 1/(2piR4C3)=160Hz
 

Re: Output stage

Verba said:
C3 is too big, i think you should take it 100nF-1000nF.
Now you get LPF at 1/(2piR4C3)=160Hz

But shouldn't my fliter be at 1kHz to let the average vale of the PW modulated signal (which is the same frequency of the sine input signal) pass???
Isn't the cutoff frequency 1/(2*pi*L*C)???
 

Re: Output stage

I hope this may help you
**broken link removed**
 

    diemilio

    Points: 2
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Re: Output stage

diemilio,
the cut off frequency will be 1/(2pi√(LC)), but that is if Rload>>1/sC (infinite load)
I gave you an aproximate cutoff frequency for L=0, and it's too low, within audio frequency band.
You must move it at least to 20-30 KHz
 

    diemilio

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Output stage

Yes.. the low pass filter must be at least 20 or 30khz to allow audio signal.

The output stage need to be very very large,.. you need buffer for that.
 

Re: Output stage

diemilio,

but it seems to me that I'm missing something here cause if you notice the LC filter is used to get the original audio wave (in this case the sine wave) from a PW modulated signal, so at resonace the capacitor will act as very low impedance making a high current (very high) flow through it making my efficency 0!!!.

When you said that at resonant frequency, the cap is a short circuit to gnd. But the inductor will have a very high impedance and hence can limit the current. In fact, it is the inductor which actually controls the ripple in the current. The ripple is the high frequency current.

Also, if you are designing a Class D amplifier, you also can take care of the ripples in the voltages/currents by establishing a feedback loop.....

I hope that I am clear
 

    diemilio

    Points: 2
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Re: Output stage

diemilio,
You want to keep the resonant frequency of the LC filter well above the input signal frequency (1KHz). The LC filter must be designed so that it provides adequate attenuation at the reference triangle wave frequency. However, in your case, the reference triangle frequncy is the same as the input signal frequncy. 1/(.5mS + .5ms) = 1 !KHz. It must be much higher than this for the amplifier to work properly. Typically, the reference frequency would be at least 10X the highest input signal frequency.
Regards,
Kral







bunalmis
 

    diemilio

    Points: 2
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Re: Output stage

Thanks everyone for your help.

I could finally solve one of my problems!!!

diemilio
 

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