I am trying to create a new via in the allegro PCB design. I created a new padstack for vi. Now, here is what I did
Go to Setup -> Constraints. Under Physical Rules Set section, click on Set values, scroll down on the pop-up window and select the via previously defined.
Now this via should be available for routing - right ? But it does not show up.
First check to see if that Via is assigned to any particular net class. Then select routing and check Control Menu you should see Via that corresponds to given net class.
Please check the constraint set name and subclass in physical set setting. and try to put the via as per the these 2 settings(we can see the via in the correct constraint set and in correct layer).
I am trying to create a new via in the allegro PCB design. I created a new padstack for vi. Now, here is what I did
Go to Setup -> Constraints. Under Physical Rules Set section, click on Set values, scroll down on the pop-up window and select the via previously defined.
Now this via should be available for routing - right ? But it does not show up.