Problem with introducing flip-flops using Spartan XCS10

[djolestojic]

Problem with Spartan

I am using spartan XCS10 and I have problem introducing any kind of flip-flop into design (as a component, or through VHDL) - basically, compiler doesn't generate any kind of error but I don't get appropriate response from chip.

Can anybody help. Thanks.

 

[Beetroots]

Post your HDL code so that we can see what's wrong. Also which synthesis tool are you using.

 

[Bartart]

Hi!

Did you try to simulate your design funcionality.


As Beetroots said post your code.


Bart

 

[Gunship]

Re: Problem with Spartan

I am using spartan XCS10 and I have problem introducing any kind of flip-flop into design (as a component, or through VHDL) - basically, compiler doesn't generate any kind of error but I don't get appropriate response from chip.

Can anybody help. Thanks.

First, you should check your snythesis report. Take a look and see if it has created anything at all. The obvious one is errors or warning which can potentially rip out your entire design. If things seems OK, then check if your downloading has a problem. Create a simple in/out with a Flip-Flop and see if it works.

One thing of course, I assume you did simulate.

 

[djolestojic]

Solution

I seem to have found what was causing problems - mayby it could be of some assistance to anybody.

I am using Foundation 3.1 software for Spartan design, and I am programing it through JTAG port for development causes. I have simulated the design and it worked properly. But when I tested it on chip it failed.

I thought that problem was with STARTUP component, but it turned out that the required operation was to selecet option 'C3' in Implementation->Options->Configure->Enable outputs !?? I tried to find out what it acctulay means (in Spartan datasheets), but available information were not sufficient to come up with any conclusion.