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Problem with in/out ports in bidirectional buffer

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Nikolai

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I have a doubt regarding bidirectional buffer. basically the problem is about dealing with inout ports..

in the diagram , A and B are the inout ports. The level on T will decide the direction.

the problem is when data is flowing from A to B, how to ensure that level(by some external means) is not imposed upon signal B.

in simple words if im writing '1' to A then how to make sure that some other source doesnt attempt to write a '0' on B.
 

Re: Bidirectional Buffer

Nikolai,

Only you can answer it, because the control pin "T" must be enabled when outputs of buffer and external circuitry will not conflict.


+++
 

Bidirectional Buffer

Nikolai,


What are others sources? Signal can be control only in one place in VHDL code.

A <= B when T = '1' else 'Z';
B <= A when T = '0' else 'Z';

Try this and see if it works for you
 

Re: Bidirectional Buffer

Suppose i assign different pins of the FPGA to A,B and T respectively...

In that case, im free to control the voltage levels on those pins and effectively on the signals A,B and T..

Suppose A = Vcc and B = Gnd... I.e im attempting to write to both signals A and B simultaneously...

So wont this be a problem ?
 

Re: Bidirectional Buffer

Is this inside or outside the FPGA?

Inside you MUST know the direction of the signal (so the level of T), otherwise there is no way to solve it. There exists a simulation model (Google "Ben Cohen" switch model vhdl) of a switching bidirectional wire/buffer, but it is not synthesizeable, for obvious reasons: there is no hardware equivalent in FPGA. In the FPGA, you can cross-couple tristating drivers of course, but you still have to know the direction to avoid the kind of "short-circuits" you describe.

Outside the FPGA you could resort to open collector based tricks, like this https://www.esacademy.com/faq/i2c/q_and_a/faq/i2cqa3.htm
 

Re: Bidirectional Buffer

Hi,

When you are driving A you read the data in the C terminal and compare the driven data and captured data. If both are same no overlapping. One problem is that because of the routing delays glitch may come. To solve this do the comparison at clock edge that you are driving A.
 

Re: Bidirectional Buffer

Nikolai said:
Suppose i assign different pins of the FPGA to A,B and T respectively...

In that case, im free to control the voltage levels on those pins and effectively on the signals A,B and T..

Suppose A = Vcc and B = Gnd... I.e im attempting to write to both signals A and B simultaneously...
One way is to buffer all inputs to B with 3-state buffers. You put the Gnd as an input to one of the 3-state buffers, and the output of that buffer to B. You need other signals that will put the outputs of the external buffers into hi-Z state when the B pin from the FPGA is not. Whether or not these external signals come from the FPGA or not depends on whether it's a master or a slave.
 

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