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Problem with clocking (using XUP Virtex II Pro board)

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Member level 2
Jun 28, 2007
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Hi Everyone,

I have a small problem with regards clocking , am sure there is an easy soloution but want to know what you all think.

Right... i am using a XUP Virtex II Pro Evaluation board.

I am attaching an ADC board to this FPGA board, the ADc board is being clocked at 75 MHz, i want to make this 75 MHz clock also the source clock on my FPGA board. So that when i am carrying out tasks like sampling and writing the ADC data to memory , i know exactly when its changing. Now the board comes with two sources already , a 100MHz clock and a 32 MHz clock and dont see removing them as an option.

There are footprints on the board which look like can attach a SMA connection or something along those lines , but its loking for EXTERNAL_CLOCK_P and EXTERNAL_CLOCK_N, but my clock is not split up. The source clock just now i am using just now to cock the ADC is with an SMA connection , but the ADC board has an output pin which has this clock signal on it , so i dont know if i could just take a wire from that , but where to ?

Sorry if this seems confusing , i confuse myself most of the time ,
Thanks for your help.


Re: Clock Problem...

You can use the DCMs in the FPGA to generate your 75MHz clock. Use the 100MHz clock and generate a 75MHz clock with the same phase relationship as the other ADCs 75Mhz clock.

If the ADC clock is connected or can be connected to any of the FPGA pins, you can use that as the clock source and not use the other clock sources.

The EXTERNAL_CLOCK_P and EXTERNAL_CLOCK_N signals are differential clock inputs/outputs. If you have a differential clock source you can connect them to these pins.

Re: Clock Problem...

Hi , thanks for the reply.
I have had an idea, since the board comes with a footprint to attach an clock source , can i not just take a wire from my clock out pin to the output of that footprint ? it then gets connected to the FPGA pin and can be my clock source ?


Re: Clock Problem...

Yes, you can do that. You can take a wire from the clock source and connect it to the FPGA pin and use that as your clock source. I would suggest you check the pinouts of the FPGA and connect it to the Global Clock pins.

Clock Problem...

It is encourage to sample the output using higher frequency, so why would u like to use the same freq to sampling the output?

Correct me if i wrong.
Thanks and regards

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