Problem with charge pump PLL

[jerryhuang]

is that spur of pll

my pll is a charge pump kind pll,my problem is when my pll is locked,see from the control votage of vco ,you will see a large and low frequence (about 120khz) ripple,and the votage ripple got a ampiltude as large as 2mv,so the output frequnce of vco has a large derivation as 200Khz from the carrier frequence.
my vco gain about 50mhz/v,so the 2mv ripple is not aceptable ,but this low frequnce can not be descresed with a low pass filter ,becase this will need a low bandwith ,low gian filter ,can it be reality?
so i want to know what is the main reason of that kind ripple

 

[aryajur]

Re: is that spur of pll

What is your locking frequency and VCO frequency variation limits?

 

[hanm]

Re: is that spur of pll

Hi jerryhuang,spur occurs at pfd reference freqency and it's harmonics.
Is your reference frequency 120KHz?
U may lower the lpf's bandwidth to alleviate the ripple.

hanm

 

[jerryhuang]

is that spur of pll

my locking frequence is 2Ghz,VCO frequency variation limits is what?
reference frequence is 20Mhz,so it is not the reference spur and its' hamonics,I think it is fractional spur?

 

[aryajur]

Re: is that spur of pll

I don't understand, if your reference frequency is 20MHz then that means that you are trying to lock to 20MHz then what is 2GHz?
Also check the frequency at the output of the VCO, maybe that is off by 120KHz to the frequency you are trying to lock.

 

[yibinhsieh]

Re: is that spur of pll

If your reference is 20MHz and you use integer N divider, the ripple in VCO control voltage will not have the 120KHz frequency component. And fractional spur only appears in fractional-N PLL.

Yibin.

 

[jerryhuang]

is that spur of pll

it is a fractional pll ,so i think it is fractinal spur

 

[Btrend]

Re: is that spur of pll

u can try to increasing the loop gain LG =Kpfd*Icp*Klpf*Kvco/N ,
caz' noise except the VCO noise will be reduce through the closed loop, and the
reduction is 1/(1+LG).
said if LG = 60dB , u should have a noise under 1mV if noise is 1V (assumption),
if LG = 40dB, u should have a noise under 10mV if noise is 1V (assumption)

 

[layes2]

Re: is that spur of pll

perhaps it is due to leakge current
and pfd deadzone

 

[mmohsen]

Re: is that spur of pll

perhaps it is due to leakge current
and pfd deadzone

i think if so it must be refrence spurs which isnot our case here !?
regards

 

[freewing]

Re: is that spur of pll

It might be caused by current mismatch in the CP or leakage current. Look at this and delibrately increase current mismatch to see if the ripple changes.

 

[eng_Semi]

Re: is that spur of pll

Any mismatch in the PLL will cause ripples on the control voltage, from these causes:
1. The mismatch between Iup & Idn.
2. Finite input impedance of the VCO.
3. Leakage in the CP switches.

so try to check these.