I want to convert 0.483 to ufixed type. Manually, I get 0000.0111 (3 downto -4) when I calculate by hand.
But, this value is not same with the value in modelsim which is 0000.1000. I write like this;
ip1<=to_ufixed(0.483,n1);
What the correct value of 0.483 in ufixed? Do I calculate in wrong way?..needs help, thanks
package my_data_types is
type vector is array (natural range <>) of integer;
type ufixed is array (natural range <>) of std_logic;
end my_data_types;
library ieee;
library ieee_proposed;
use ieee_proposed.fixed_pkg.all;
use work.my_data_types.all;
entity fix is
port (clk: in bit;
nprev: in vector (0 to 7);
ip1: out ufixed (3 downto -4));
end fix;
architecture fix of fix is
signal n1: ufixed (3 downto -4);
begin
process(clk)
begin
if (clk'event and clk='1') then
for i in 0 to 7 loop
ip1(i) <= to_ufixed (nprev(i),n1);
end loop;
end if;
end process;
end fix;
I get this error:
Error (10482): VHDL error at fix.vhd(3): object "std_logic" is used but not declared.
you dont need to define ufixed, it is already in the fixed_pkg.
so you you need to do is:
Code:
library floatfixlib; --(or IEEE_PROPOSED if you're using an older version)
use floatfixlib.fixed_pkg.all;
.....
signal a : ufixed(10 downto -27);
...etc
Now I get this error:
Error (10511): VHDL Qualified Expression error at fix.vhd(23): to_ufixed type specified in Qualified Expression must match std_ulogic type that is implied for expression by context.
At this line: ip1(i) <= to_ufixed (nprev(i),n1);